Nico Huber merged this change.
Enable native 4BA instructions for Spansion 25FL256S
Change-Id: I0ffc816ca714ecce5b89b1eaadb5e73ccb38d9ab
Signed-off-by: Nico Huber <nico.h@gmx.de>
Tested-by: Michael Fuckner <michael@fuckner.net>
Reviewed-on: https://review.coreboot.org/25134
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: David Hendricks <david.hendricks@gmail.com>
---
M flashchips.c
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/flashchips.c b/flashchips.c
index c75e0b8..fdaaa2f 100644
--- a/flashchips.c
+++ b/flashchips.c
@@ -12524,7 +12524,7 @@
.total_size = 32768,
.page_size = 256,
/* OTP: 1024B total, 32B reserved; read 0x4B; write 0x42 */
- .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP | FEATURE_4BA_ENTER_EAR7,
+ .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP | FEATURE_4BA_EAR7,
.tested = TEST_OK_PREW,
.probe = probe_spi_rdid,
.probe_timing = TIMING_ZERO,
@@ -12540,6 +12540,9 @@
.block_erase = spi_block_erase_20,
}, { */
.eraseblocks = { { 64 * 1024, 512} },
+ .block_erase = spi_block_erase_dc,
+ }, {
+ .eraseblocks = { { 64 * 1024, 512} },
.block_erase = spi_block_erase_d8,
}, {
.eraseblocks = { { 32768 * 1024, 1} },
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