Nico Huber has uploaded this change for review.

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ichspi: Fix 100 series PCH (Skylake) support

Pretty subtle missing `else` made flashrom treat Skylake like older
chipsets.

Change-Id: I14bf578964124d4677cb5dfca01c9d1b0d279c9c
Signed-off-by: Nico Huber <nico.h@gmx.de>
Reported-by: Youness Alaoui <kakaroto@kakaroto.homelinux.net>
---
M ichspi.c
1 file changed, 1 insertion(+), 1 deletion(-)

git pull ssh://review.coreboot.org:29418/flashrom refs/changes/32/22832/1

diff --git a/ichspi.c b/ichspi.c
index 859d55f..c7bda92 100644
--- a/ichspi.c
+++ b/ichspi.c
@@ -1715,7 +1715,7 @@
 		hwseq_data.addr_mask	= PCH100_FADDR_FLA;
 		hwseq_data.only_4k	= true;
 		hwseq_data.hsfc_fcycle	= PCH100_HSFC_FCYCLE;
-	} if (ich_generation == CHIPSET_C620_SERIES_LEWISBURG) {
+	} else if (ich_generation == CHIPSET_C620_SERIES_LEWISBURG) {
 		num_freg		= 12;	/* 12 MMIO regs, but 16 regions in FD spec */
 		num_pr			= 6;	/* Includes GPR0 */
 		reg_pr0			= PCH100_REG_FPR0;

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