Victor Lim has uploaded this change for review.
flashchips/gigadevice: Add GD25B127D
GD25B127D: 3V 128Mbit
https://www.gigadevice.com.cn/Public/Uploads/uploadfile/files/20220714/DS-00277-GD25B127D-Rev1.5.pdf
Change-Id: I0851a9b3112cb3aaec816b6ef2b4dad5a404d096
Signed-off-by: Victor Lim <vlim@gigadevice.com>
---
M flashchips/gigadevice.c
M include/flashchips.h
2 files changed, 3 insertions(+), 3 deletions(-)
git pull ssh://review.coreboot.org:29418/flashrom refs/changes/96/86996/1
diff --git a/flashchips/gigadevice.c b/flashchips/gigadevice.c
index 12b24b0..c1ad83d 100644
--- a/flashchips/gigadevice.c
+++ b/flashchips/gigadevice.c
@@ -794,7 +794,7 @@
{
.vendor = "GigaDevice",
- .name = "GD25Q128E/GD25B128E/GD25R128E/GD25Q127C",
+ .name = "GD25Q128E/GD25B128E/GD25R128E/GD25Q127C/GD25B127D",
.bustype = BUS_SPI,
.manufacture_id = GIGADEVICE_ID,
.model_id = GIGADEVICE_GD25Q128,
@@ -802,7 +802,7 @@
.page_size = 256,
/* OTP: 3072B total; read 0x48; write 0x42, erase 0x44 */
.feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP | FEATURE_WRSR2,
- .tested = TEST_OK_PREWB,
+ .tested = TEST_UNTESTED,
.probe = PROBE_SPI_RDID,
.probe_timing = TIMING_ZERO,
.block_erasers =
diff --git a/include/flashchips.h b/include/flashchips.h
index 556729c..6e60864 100644
--- a/include/flashchips.h
+++ b/include/flashchips.h
@@ -394,7 +394,7 @@
#define GIGADEVICE_GD25Q16 0x4015 /* Same as GD25Q16B (which has OTP) */
#define GIGADEVICE_GD25Q32 0x4016 /* Same as GD25Q32B */
#define GIGADEVICE_GD25Q64 0x4017 /* Same as GD25Q64B */
-#define GIGADEVICE_GD25Q128 0x4018 /* Same as GD25Q128B, GD25Q127C, GD25Q128C,and GD25Q128E, GD25B128E, GD25R128E can be distinguished by SFDP */
+#define GIGADEVICE_GD25Q128 0x4018 /* Same as GD25Q128B, GD25Q127C, GD25Q128C, GD25B127D, GD25Q128E, GD25B128E, GD25R128E can be distinguished by SFDP */
#define GIGADEVICE_GD25Q256D 0x4019 /* Same as GD25B256E, GD25Q256E, GD25R256E */
#define GIGADEVICE_GD25B512MF 0x401A /* Same as GD25R512MF */
#define GIGADEVICE_GD25VQ21B 0x4212
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