David Hendricks has uploaded this change for review.

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chipset_enable: Mark Braswell as tested

Reported by Uwe Vieweg:
https://mail.coreboot.org/pipermail/flashrom/2017-August/015059.html

Change-Id: Iaf7558af8737af36401f577ca7aba9fd7114a3df
Signed-off-by: David Hendricks <david.hendricks@gmail.com>
---
M chipset_enable.c
1 file changed, 1 insertion(+), 1 deletion(-)

git pull ssh://review.coreboot.org:29418/flashrom refs/changes/23/20923/1

diff --git a/chipset_enable.c b/chipset_enable.c
index 20d2662..50fbdb0 100644
--- a/chipset_enable.c
+++ b/chipset_enable.c
@@ -1735,7 +1735,7 @@
 	{0x8086, 0x1f39, NT,  "Intel", "Avoton/Rangeley",		enable_flash_silvermont},
 	{0x8086, 0x1f3a, NT,  "Intel", "Avoton/Rangeley",		enable_flash_silvermont},
 	{0x8086, 0x1f3b, NT,  "Intel", "Avoton/Rangeley",		enable_flash_silvermont},
-	{0x8086, 0x229c, NT,  "Intel", "Braswell",			enable_flash_silvermont},
+	{0x8086, 0x229c, OK,  "Intel", "Braswell",			enable_flash_silvermont},
 	{0x8086, 0x2310, NT,  "Intel", "DH89xxCC (Cave Creek)",		enable_flash_pch7},
 	{0x8086, 0x2390, NT,  "Intel", "Coleto Creek",			enable_flash_pch7},
 	{0x8086, 0x2410, OK,  "Intel", "ICH",				enable_flash_ich0},

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