9 comments:
Patch Set #1, Line 154: // Configure Pin to Push-Pull GPIO
`/* 0x4F[2:0] = b001 */` […]
/* read 0x4F into val. */
ret |= realtek_mst_i2c_spi_write_register(fd, 0xF4, 0x9F);
ret |= realtek_mst_i2c_spi_write_register(fd, 0xF5, 0x10);
ret |= realtek_mst_i2c_spi_write_register(fd, 0xF4, 0x4F);
ret |= realtek_mst_i2c_spi_read_register(fd, 0xF5, &val);
/* write 0x4F[3:0] = b0001 */
Q: Need to find out where 0x10 is coming from?
Specifically, 0xF8 -> 0xF0 seems suspect to change that mask, why are we touching the high bit? […]
Q: Need to ask what this low byte represents precisely?
Patch Set #1, Line 167: // Set Pin Value to High
`/* Toggle pin value, 0xFFF5[0] = |toggle|. */` […]
/* read 0x3F into val. */
/* write 0x3F[1:0] = b|toggle| */
Q: like 0x10 above, should know a bit better where this value came from?
`#define GPIO_CONF 0x3F` […]
Actually in retrospect it looks like #define GPIO_CONFIG 0x4F and #define GPIO_DATA 0x3F
`0xFE - 1111 111 0` […]
ignore I misread thinking xor but we should know what this register space represents, currently think this is the state value of the pins.
To view, visit change 46089. To unsubscribe, or for help writing mail filters, visit settings.