Nico Huber would like HAOUAS Elyes, David Hendricks and Stefan Reinauer to review this change.
spi25: Fix layering violation in probe_spi_rdid4()
Move the message to a lower level where we can do a more generic check
and don't need internal knowledge of the SPI-master driver.
Change-Id: Idd21d20465cb214f3ff5bf3267b9014f8beee3f3
Signed-off-by: Nico Huber <nico.h@gmx.de>
---
M spi25.c
1 file changed, 5 insertions(+), 20 deletions(-)
git pull ssh://review.coreboot.org:29418/flashrom refs/changes/50/33650/1
diff --git a/spi25.c b/spi25.c
index 06e451f..006b81f 100644
--- a/spi25.c
+++ b/spi25.c
@@ -100,9 +100,11 @@
uint32_t id1;
uint32_t id2;
- if (spi_rdid(flash, readarr, bytes)) {
+ const int ret = spi_rdid(flash, readarr, bytes);
+ if (ret == SPI_INVALID_LENGTH)
+ msg_cinfo("%d byte RDID not supported on this SPI controller\n", bytes);
+ if (ret)
return 0;
- }
if (!oddparity(readarr[0]))
msg_cdbg("RDID byte 0 parity violation. ");
@@ -147,24 +149,7 @@
int probe_spi_rdid4(struct flashctx *flash)
{
- /* Some SPI controllers do not support commands with writecnt=1 and
- * readcnt=4.
- */
- switch (flash->mst->spi.type) {
-#if CONFIG_INTERNAL == 1
-#if defined(__i386__) || defined(__x86_64__)
- case SPI_CONTROLLER_IT87XX:
- case SPI_CONTROLLER_WBSIO:
- msg_cinfo("4 byte RDID not supported on this SPI controller\n");
- return 0;
- break;
-#endif
-#endif
- default:
- return probe_spi_rdid_generic(flash, 4);
- }
-
- return 0;
+ return probe_spi_rdid_generic(flash, 4);
}
int probe_spi_rems(struct flashctx *flash)
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