Nikolai Artemiev has uploaded this change for review.

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ichspi: clear byte count in ich_start_hwseq_xfer()

When preparing for a hwseq transfer in ich_start_hwseq_xfer(), clear the
HSFC_FDBC bits before setting the new byte count. Otherwise the old byte
count bits remain set, resulting in too many bytes being transferred.

In particular this causes status register read/write operations to fail,
and probably causes issues in other hwseq operations as well.

BUG=b:257845782,b:258280679
BRANCH=none
TEST=flashrom {--wp-enable,--wp-disable}

Change-Id: I2535bdfb77ff370bddcb507a229bbf4119681cdf
Signed-off-by: Nikolai Artemiev <nartemiev@google.com>
---
M ichspi.c
1 file changed, 22 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/flashrom refs/changes/22/69422/1
diff --git a/ichspi.c b/ichspi.c
index 4e982f0..1c3fad3 100644
--- a/ichspi.c
+++ b/ichspi.c
@@ -1362,6 +1362,7 @@
hsfc = REGREAD16(ICH9_REG_HSFC);
hsfc &= ~hwseq_data->hsfc_fcycle; /* clear operation */
hsfc |= hsfc_cycle;
+ hsfc &= ~HSFC_FDBC; /* clear byte count */
hsfc |= HSFC_FDBC_VAL(len - 1);
hsfc |= HSFC_FGO; /* start */
prettyprint_ich9_reg_hsfc(hsfc, ich_generation);

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Gerrit-Project: flashrom
Gerrit-Branch: master
Gerrit-Change-Id: I2535bdfb77ff370bddcb507a229bbf4119681cdf
Gerrit-Change-Number: 69422
Gerrit-PatchSet: 1
Gerrit-Owner: Nikolai Artemiev <nartemiev@google.com>
Gerrit-MessageType: newchange