Attention is currently required from: Nicholas Chin, Angel Pons.

5 comments:

File ch347t_spi.c:
- Patch Set #2, Line 34: CH347_CMD_SPI_CONTROL,
  Maybe make it more clear that this controls the CS lines?
  Yes
File ch347t_spi.c:
- Patch Set #3, Line 30: #define CH347_MAX_DATA_READ 4096
  This probably could be set to a higher value. […]
  the 512 and 4096 is as same as WCH's dll so I copied those value there. And I try talk with WCH's FAE to detect the maximum value.
  PS: I had test the CH347_MAX_DATA_READ, it also work even it is 1MiB.
- Patch Set #3, Line 41:
```
enum spi_prescaler {
	SPI_BAUDRATEPRESCALER_2		= 0x00,
	SPI_BAUDRATEPRESCALER_4		= 0x08,
	SPI_BAUDRATEPRESCALER_8		= 0x10,
	SPI_BAUDRATEPRESCALER_16	= 0x18,
	SPI_BAUDRATEPRESCALER_32	= 0x20,
	SPI_BAUDRATEPRESCALER_64	= 0x28,
	SPI_BAUDRATEPRESCALER_128	= 0x30,
	SPI_BAUDRATEPRESCALER_256	= 0x38
};
```
  Alternatively the prescaler values could start from 1 and then the formula would be freq = 60 MHz / […]
```
CH347 is based on CH32VF3x, SPIx_CTLR1:BR[2:0] control the spi's clock, it has this defines:
 
000：FPCLK/2
001：FPCLK/4
010：FPCLK/8
011：FPCLK/16
100：FPCLK/32
101：FPCLK/64
110：FPCLK/128
111：FPCLK/256
```
  So "enum spi_prescaler" is started from 1.
- Patch Set #3, Line 84:
```
enum spi_nss {
	SPI_NSS_SOFT			= 0x0200,
	SPI_NSS_HARD			= 0x0000
};
```
  I would rename these to be clearer what it does, maybe `enum spi_cs`, `SPI_CS_SOFTWARE`, and `SPI_CS […]
  I don't know what this means, maybe it is used for spi device. On spi master, we control cs by command 0xC1.
- Patch Set #3, Line 179: buf, n + 3,
  This may go over the 512 byte max packet size of the write endpoint since n can be up to 512 due to […]
  Let's use the default value as same as DLL. We can update this code when we got a clear reply that it can support a larger value.

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