Angel Pons has uploaded this change for review.

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chipset_enable.c: Add Gemini Lake eSPI PCI device ID

Taken from coreboot `PCI_DEVICE_ID_INTEL_GLK_ESPI` macro, untested.

Change-Id: Ie34527e56edcba4982f17b8e0aef0fc4280a52bc
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
---
M chipset_enable.c
1 file changed, 1 insertion(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/flashrom refs/changes/54/54354/1

diff --git a/chipset_enable.c b/chipset_enable.c
index 025203c..cdd51ae 100644
--- a/chipset_enable.c
+++ b/chipset_enable.c
@@ -2084,6 +2084,7 @@
 	{0x8086, 0xa2d2, B_S,    NT,  "Intel", "X299",				enable_flash_pch100},
 	{0x8086, 0x5ae8, B_S,    DEP, "Intel", "Apollo Lake",			enable_flash_apl},
 	{0x8086, 0x5af0, B_S,    DEP, "Intel", "Apollo Lake",			enable_flash_apl},
+	{0x8086, 0x3197, B_S,    NT,  "Intel", "Gemini Lake",			enable_flash_glk},
 	{0x8086, 0x31e8, B_S,    DEP, "Intel", "Gemini Lake",			enable_flash_glk},
 	{0x8086, 0xa303, B_S,    NT,  "Intel", "H310",				enable_flash_pch300},
 	{0x8086, 0xa304, B_S,    NT,  "Intel", "H370",				enable_flash_pch300},

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