Shiyu Sun has uploaded this change for review.
realtek_mst_i2c_spi.c: Add ISP mode check
Check ISP mode before doing reset and add waiting
after the enter ISP mode command.
BUG=None
TEST=build and run mst commands
Signed-off-by: Shiyu Sun <sshiyu@chromium.org>
Change-Id: Ib1ab8370eb6335a77bb293fc98a8ab7be465db4f
---
M realtek_mst_i2c_spi.c
1 file changed, 27 insertions(+), 2 deletions(-)
git pull ssh://review.coreboot.org:29418/flashrom refs/changes/62/48662/1
diff --git a/realtek_mst_i2c_spi.c b/realtek_mst_i2c_spi.c
index 538b07a..0126157 100644
--- a/realtek_mst_i2c_spi.c
+++ b/realtek_mst_i2c_spi.c
@@ -32,7 +32,7 @@
#define MAX_SPI_WAIT_RETRIES 1000
#define MCU_MODE 0x6F
-#define ENTER_ISP_MODE 0x80
+#define MCU_ISP_MODE_MASK 0x80
#define START_WRITE_XFER 0xA0
#define WRITE_XFER_STATUS_MASK 0x20
@@ -117,10 +117,30 @@
return (val & mask) != target ? SPI_GENERIC_ERROR : ret;
}
+static int realtek_mst_i2c_spi_in_isp_mode(int fd)
+{
+ uint8_t mcu_mode_val;
+ int ret = realtek_mst_i2c_spi_read_register(fd, MCU_MODE, &mcu_mode_val);
+ if (ret || (mcu_mode_val & MCU_ISP_MODE_MASK) == 0)
+ return 0;
+ return 1;
+}
+
static int realtek_mst_i2c_spi_enter_isp_mode(int fd)
{
- int ret = realtek_mst_i2c_spi_write_register(fd, MCU_MODE, ENTER_ISP_MODE);
+ int ret = realtek_mst_i2c_spi_write_register(fd, MCU_MODE, MCU_ISP_MODE_MASK);
+ /* wait for isp enter */
+ int retry = 10;
+ while (retry-- > 0) {
+ if (realtek_mst_i2c_spi_in_isp_mode(fd) == 1)
+ break;
+ struct timespec wait_200ms = { 0, (unsigned)2e8 };
+ nanosleep(&wait_200ms, NULL);
+ }
+
+ if (retry < 0)
+ return SPI_GENERIC_ERROR;
// set internal osc divider register to default to speed up MCU
// 0x06A0 = 0x74
ret |= realtek_mst_i2c_spi_write_register(fd, 0xF4, 0x9F);
@@ -140,6 +160,11 @@
static int realtek_mst_i2c_spi_reset_mpu(int fd)
{
+ if (realtek_mst_i2c_spi_in_isp_mode(fd) == 0) {
+ msg_perr("%s: MST not in ISP mode, reset will not happen.\n", __func__);
+ return SPI_GENERIC_ERROR;
+ }
+
int ret = 0;
// 0xFFEE[1] = 1;
uint8_t val = 0;
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