Alan Green has uploaded this change for review.
flashchips.h: merge definitions from Chromium fork
This change merges flashchips.h definitions from the chromium fork of
flashrom. It is a precursor to merging flashchips.c.
The corresponding downstream change, where coreboot's flashchips.h was
merged into Chromium's version is:
https://chromium-review.googlesource.com/c/chromiumos/third_party/flashrom/+/1683554
After this change and the Chromium change are submitted, the two
versions of flashchips.h will be identical.
Signed-off-by: Alan Green <avg@google.com>
Change-Id: Ie280f351045bdcbc454d6f829fc071af820382b1
---
M flashchips.c
M flashchips.h
2 files changed, 38 insertions(+), 4 deletions(-)
git pull ssh://review.coreboot.org:29418/flashrom refs/changes/97/33997/1
diff --git a/flashchips.c b/flashchips.c
index 2a9ebb7..1b4b3ce 100644
--- a/flashchips.c
+++ b/flashchips.c
@@ -5889,7 +5889,7 @@
.name = "GD25LQ128",
.bustype = BUS_SPI,
.manufacture_id = GIGADEVICE_ID,
- .model_id = GIGADEVICE_GD25LQ128,
+ .model_id = GIGADEVICE_GD25LQ128CD,
.total_size = 16384,
.page_size = 256,
/* OTP: 1024B total, 256B reserved; read 0x48; write 0x42, erase 0x44 */
diff --git a/flashchips.h b/flashchips.h
index a1b38e0..0d816c8 100644
--- a/flashchips.h
+++ b/flashchips.h
@@ -36,6 +36,9 @@
#define PROGMANUF_ID 0xFFFE /* dummy ID for opaque chips behind a programmer */
#define PROGDEV_ID 0x01 /* dummy ID for opaque chips behind a programmer */
+#define VARIABLE_SIZE_MANUF_ID 0x3eaf
+#define VARIABLE_SIZE_DEVICE_ID 0x10af
+
#define ALLIANCE_ID 0x52 /* Alliance Semiconductor */
#define ALLIANCE_AS29F002B 0x34
#define ALLIANCE_AS29F002T 0xB0
@@ -151,6 +154,7 @@
#define ATMEL_AT25SF081 0x8501
#define ATMEL_AT25SF161 0x8601
#define ATMEL_AT25SL128A 0x4218
+#define ATMEL_AT25SF128A 0x8901 /* Adesto AT25SF128A */
#define ATMEL_AT26DF041 0x4400
#define ATMEL_AT26DF081 0x4500 /* guessed, no datasheet available */
#define ATMEL_AT26DF081A 0x4501
@@ -196,7 +200,9 @@
#define ATMEL_AT49BV512 0x03 /* Same as AT49F512 */
#define ATMEL_AT49F001N 0x05 /* Same as AT49F001 */
#define ATMEL_AT49F001NT 0x04 /* Same as AT49F001T */
+#define ATMEL_AT49F020 0x0B
#define ATMEL_AT49F002N 0x07 /* for AT49F002(N) */
+#define ATMEL_AT49F002NT 0x08 /* for AT49F002(N)T */
#define ATMEL_AT49LH002 0xE9
#define ATMEL_AT49LH00B4 0xED
#define ATMEL_AT49LH004 0xEE
@@ -270,6 +276,13 @@
#define EON_EN25P64 0x16
#define EON_EN25B64T 0x46
#define EON_EN25B64B 0x36
+#define EON_EN25D16 0x3015
+#define EON_EN25Q40 0x3013
+#define EON_EN25Q80 0x3014
+#define EON_EN25D16 0x3015 /* Same as Q16 */
+#define EON_EN25Q32 0x3016
+#define EON_EN25Q64 0x3017
+#define EON_EN25Q128 0x3018
#define EON_EN25F05 0x3110
#define EON_EN25F10 0x3111
#define EON_EN25F20 0x3112
@@ -302,6 +315,7 @@
#define EON_EN29F010 0x20
#define EON_EN29F040A 0x7F04
#define EON_EN29LV010 0x7F6E
+#define EON_EN29LV040A 0x7F4F /* EN29LV040(A) */
#define EON_EN29LV040 0x4F /* Same as EN29LV040A */
#define EON_EN29LV640B 0xCB
#define EON_EN29LV640T 0xC9
@@ -373,6 +387,7 @@
#define GIGADEVICE_GD25Q32 0x4016 /* Same as GD25Q32B */
#define GIGADEVICE_GD25Q64 0x4017 /* Same as GD25Q64B */
#define GIGADEVICE_GD25Q128 0x4018 /* GD25Q128B and GD25Q128C only, can be distinguished by SFDP */
+#define GIGADEVICE_GD25Q256D 0x4019
#define GIGADEVICE_GD25VQ21B 0x4212
#define GIGADEVICE_GD25VQ41B 0x4213 /* Same as GD25VQ40C, can be distinguished by SFDP */
#define GIGADEVICE_GD25VQ80C 0x4214
@@ -382,7 +397,7 @@
#define GIGADEVICE_GD25LQ16 0x6015
#define GIGADEVICE_GD25LQ32 0x6016
#define GIGADEVICE_GD25LQ64 0x6017 /* Same as GD25LQ64B (which is faster) */
-#define GIGADEVICE_GD25LQ128 0x6018
+#define GIGADEVICE_GD25LQ128CD 0x6018
#define GIGADEVICE_GD29GL064CAB 0x7E0601
#define HYUNDAI_ID 0xAD /* Hyundai */
@@ -452,6 +467,8 @@
#define SHARP_LH28F008SA 0xA2 /* Sharp chip, Intel Vendor ID */
#define SHARP_LH28F008SC 0xA6 /* Sharp chip, Intel Vendor ID */
+#define INTEL_HWSEQ 0xFFFE /* dummy ID for hardware sequencing */
+
#define ISSI_ID 0xD5 /* ISSI Integrated Silicon Solutions, see also PMC. */
#define ISSI_ID_SPI 0x9D /* ISSI ID used for SPI flash, see also PMC_ID_NOPREFIX */
#define ISSI_IS25LP064 0x6017
@@ -487,6 +504,7 @@
#define MACRONIX_MX25L1605 0x2015 /* MX25L1605 (64k 0x20); MX25L1605A/MX25L1606E/MX25L1608E (4k 0x20, 64k 0x52); MX25L1605D/MX25L1608D/MX25L1673E (4k 0x20) */
#define MACRONIX_MX25L3205 0x2016 /* MX25L3205, MX25L3205A (64k 0x20); MX25L3205D/MX25L3208D (4k 0x20); MX25L3206E/MX25L3208E (4k 0x20, 64k 0x52); MX25L3273E (4k 0x20, 32k 0x52) */
#define MACRONIX_MX25L6405 0x2017 /* MX25L6405, MX25L6405D (64k 0x20); MX25L6406E/MX25L6408E (4k 0x20); MX25L6436E/MX25L6445E/MX25L6465E/MX25L6473E (4k 0x20, 32k 0x52) */
+#define MACRONIX_MX25L12805 0x2018 /* MX25L12805 */
#define MACRONIX_MX25L12805D 0x2018 /* MX25L12805D (no 32k); MX25L12865E, MX25L12835F, MX25L12845E (32k 0x52) */
#define MACRONIX_MX25L25635F 0x2019 /* Same as MX25L25639F, but the latter seems to not support REMS */
#define MACRONIX_MX25L1635D 0x2415
@@ -644,8 +662,17 @@
#define SPANSION_S25FL204 0x4013
#define SPANSION_S25FL208 0x4014
#define SPANSION_S25FL216 0x4015 /* Same as S25FL216K, but the latter supports OTP, 3 status regs, quad I/O, SFDP etc. */
+#define SPANSION_S25FL116K 0x4015
#define SPANSION_S25FL132K 0x4016
#define SPANSION_S25FL164K 0x4017
+#define SPANSION_S25FS128S_L 0x20180081 /* Large sectors. */
+#define SPANSION_S25FS128S_S 0x20180181 /* Small sectors. */
+#define SPANSION_S25FS256S_L 0x02190081 /* Large sectors. */
+#define SPANSION_S25FS256S_S 0x02190181 /* Small sectors. */
+#define SPANSION_S25FL128S_UL 0x20180080 /* Uniform Large (128kB) sectors */
+#define SPANSION_S25FL128S_US 0x20180180 /* Uniform Small (64kB) sectors */
+#define SPANSION_S25FL256S_UL 0x02190080 /* Uniform Large (128kB) sectors */
+#define SPANSION_S25FL256S_US 0x02190180 /* Uniform Small (64kB) sectors */
/* Spansion 29GL families got a suffix indicating the process technology but share the same 3-Byte IDs. They can
* however be differentiated by CFI byte 45h. Some versions exist which have special top or bottom boot sectors
@@ -920,7 +947,12 @@
#define WINBOND_NEX_W25Q16_V 0x4015 /* W25Q16CV; W25Q16DV */
#define WINBOND_NEX_W25Q32_V 0x4016 /* W25Q32BV; W25Q32FV in SPI mode (default) */
#define WINBOND_NEX_W25Q64_V 0x4017 /* W25Q64BV, W25Q64CV; W25Q64FV in SPI mode (default) */
-#define WINBOND_NEX_W25Q128_V 0x4018 /* W25Q128BV; W25Q128FV in SPI mode (default) */
+
+/*
+ * W25Q128 has several variants. Currently all are 3.3V except for the W25Q128FW
+ * which is 1.8V. Otherwise they should behave the same...
+ */
+#define WINBOND_NEX_W25Q128_V 0x4018 /* W25Q128BV, W25Q128FV (SPI mode), W25Q128JV */
#define WINBOND_NEX_W25Q256_V 0x4019 /* W25Q256FV or W25Q256JV_Q (QE=1) */
#define WINBOND_NEX_W25Q20_W 0x5012 /* W25Q20BW */
#define WINBOND_NEX_W25Q40BW 0x5013 /* W25Q40BW */
@@ -930,9 +962,11 @@
#define WINBOND_NEX_W25Q16_W 0x6015 /* W25Q16DW */
#define WINBOND_NEX_W25Q32_W 0x6016 /* W25Q32DW; W25Q32FV in QPI mode */
#define WINBOND_NEX_W25Q64_W 0x6017 /* W25Q64DW; W25Q64FV in QPI mode */
-#define WINBOND_NEX_W25Q128_W 0x6018 /* W25Q128FW; W25Q128FV in QPI mode */
+#define WINBOND_NEX_W25Q128_W 0x6018 /* Same as W25Q128FV (QPI mode), W25R128FV */
+#define WINBOND_NEX_W25Q128FW 0x6018 /* Same as W25Q128FV (QPI mode), W25R128FV */
#define WINBOND_NEX_W25Q128_V_M 0x7018 /* W25Q128JVSM */
#define WINBOND_NEX_W25Q256JV_M 0x7019 /* W25Q256JV_M (QE=0) */
+#define WINBOND_NEX_W25Q32JW 0x8016
#define WINBOND_ID 0xDA /* Winbond */
#define WINBOND_W19B160BB 0x49
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