Felix Singer submitted this change.
flashchips: Add WP settings for Flash Chip `W25Q512NW`
This patch adds WP register bits and decode range for Flash
Chip `W25Q512NW`.
TEST=Able to flash AP FW, wp-enable/disable on Google/rex device
which has flash chip `W25Q512NW`.
Signed-off-by: Subrata Banik <subratabanik@google.com>
Change-Id: Ic5148f71404466dcf7772e3eb6e1800eb8666696
Reviewed-on: https://review.coreboot.org/c/flashrom/+/67827
Reviewed-by: Kapil Porwal <kapilporwal@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Singer <felixsinger@posteo.net>
Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
Reviewed-by: Nikolai Artemiev <nartemiev@google.com>
---
M flashchips.c
1 file changed, 35 insertions(+), 2 deletions(-)
diff --git a/flashchips.c b/flashchips.c
index f6aa9d9..168cc7d 100644
--- a/flashchips.c
+++ b/flashchips.c
@@ -18674,8 +18674,9 @@
.model_id = WINBOND_NEX_W25Q512NW_IM,
.total_size = 64 * 1024,
.page_size = 256,
- .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP | FEATURE_4BA,
- .tested = TEST_OK_PREW,
+ .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP | FEATURE_4BA | FEATURE_WRSR2
+ | FEATURE_WRSR3,
+ .tested = TEST_OK_PREWB,
.probe = PROBE_SPI_RDID,
.probe_timing = TIMING_ZERO,
.block_erasers =
@@ -18707,6 +18708,16 @@
.write = SPI_CHIP_WRITE256,
.read = SPI_CHIP_READ,
.voltage = {1650, 1950},
+ .reg_bits =
+ {
+ .srp = {STATUS1, 7, RW},
+ .srl = {STATUS2, 0, RW},
+ .bp = {{STATUS1, 2, RW}, {STATUS1, 3, RW}, {STATUS1, 4, RW}, {STATUS1, 5, RW}},
+ .tb = {STATUS1, 6, RW},
+ .cmp = {STATUS2, 6, RW},
+ .wps = {STATUS3, 2, RW},
+ },
+ .decode_range = DECODE_RANGE_SPI25,
},
{
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