Edward O'Callaghan has uploaded this change for review.

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pcidev: scandev_inclass WIP

more than one ISA bridge??

Change-Id: I1978e178fb73485f1c5c7e732853522847267cee
Signed-off-by: Edward O'Callaghan <quasisec@google.com>
---
M board_enable.c
M pcidev.c
M programmer.h
3 files changed, 25 insertions(+), 16 deletions(-)

git pull ssh://review.coreboot.org:29418/flashrom refs/changes/77/59277/1
diff --git a/board_enable.c b/board_enable.c
index ae8ce2c..f3e8718 100644
--- a/board_enable.c
+++ b/board_enable.c
@@ -1551,26 +1551,20 @@
int i, allowed;

/* First, look for a known LPC bridge */
- for (dev = pacc->devices; dev; dev = dev->next) {
- uint16_t device_class;
- /* libpci before version 2.2.4 does not store class info. */
- device_class = pci_read_word(dev, PCI_CLASS_DEVICE);
- if ((dev->vendor_id == 0x8086) &&
- (device_class == 0x0601)) { /* ISA bridge */
- /* Is this device in our list? */
- for (i = 0; intel_ich_gpio_table[i].id; i++)
- if (dev->device_id == intel_ich_gpio_table[i].id)
- break;
-
- if (intel_ich_gpio_table[i].id)
- break;
- }
- }
-
+ dev = pcidev_scandev_inclass(0x0601, 0x8086); /* ISA bridge */
if (!dev) {
msg_perr("\nERROR: No known Intel LPC bridge found.\n");
return -1;
}
+ /* Is this device in our list? */
+ for (i = 0; intel_ich_gpio_table[i].id; i++)
+ if (dev->device_id == intel_ich_gpio_table[i].id)
+ break;
+
+ if (!intel_ich_gpio_table[i].id) {
+ msg_perr("\nERROR: No known Intel LPC bridge found.\n");
+ return -1;
+ }

/*
* According to the datasheets, all Intel ICHs have the GPIO bar 5:1
diff --git a/pcidev.c b/pcidev.c
index c9c86b8..e57b90c 100644
--- a/pcidev.c
+++ b/pcidev.c
@@ -157,6 +157,20 @@
return NULL;
}

+struct pci_dev *pcidev_scandev_inclass(uint16_t class, uint16_t vid)
+{
+ struct pci_dev *dev;
+ /* First, look for a known LPC bridge */
+ for (dev = pacc->devices; dev; dev = dev->next) {
+ uint16_t device_class;
+ /* libpci before version 2.2.4 does not store class info. */
+ device_class = pci_read_word(dev, PCI_CLASS_DEVICE);
+ if ((dev->vendor_id == vid) && (device_class == class))
+ return dev;
+ }
+ return NULL;
+}
+
struct pci_dev *pcidev_getdev(struct pci_dev *dev)
{
#if !defined(OLD_PCI_GET_DEV)
diff --git a/programmer.h b/programmer.h
index a78ee2a..41dc240 100644
--- a/programmer.h
+++ b/programmer.h
@@ -125,6 +125,7 @@
uintptr_t pcidev_readbar(struct pci_dev *dev, int bar);
struct pci_dev *pcidev_init(const struct dev_entry *devs, int bar);
struct pci_dev *pcidev_scandev(struct pci_filter *filter);
+struct pci_dev *pcidev_scandev_inclass(uint16_t class, uint16_t vid);
struct pci_dev *pcidev_getdev(struct pci_dev *dev);
/* rpci_write_* are reversible writes. The original PCI config space register
* contents will be restored on shutdown.

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Gerrit-Project: flashrom
Gerrit-Branch: master
Gerrit-Change-Id: I1978e178fb73485f1c5c7e732853522847267cee
Gerrit-Change-Number: 59277
Gerrit-PatchSet: 1
Gerrit-Owner: Edward O'Callaghan <quasisec@chromium.org>
Gerrit-MessageType: newchange