WereCatf has uploaded this change for review.
flashchips: Add Puya P25D21H
Signed-off-by: Nita Vesa <werecatf@outlook.com>
Change-Id: Idd43145c72607837cb7afa1b007e68eb8e63ebd9
---
M flashchips.c
M flashchips.h
2 files changed, 40 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/flashrom refs/changes/34/58134/1
diff --git a/flashchips.c b/flashchips.c
index 434c46d..8ca540b 100644
--- a/flashchips.c
+++ b/flashchips.c
@@ -13131,6 +13131,43 @@
},
{
+ .vendor = "PUYA",
+ .name = "P25D21H",
+ .bustype = BUS_SPI,
+ .manufacture_id = PUYA_ID,
+ .model_id = PUYA_P25D21H,
+ .total_size = 256,
+ .page_size = 256,
+ /* supports SFDP */
+ /* OTP: 3 x 256 bytes */
+ .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP,
+ .tested = TEST_OK_PREW,
+ .probe = probe_spi_rdid,
+ .probe_timing = TIMING_ZERO,
+ .block_erasers =
+ {
+ {
+ .eraseblocks = { {4 * 1024, 64} },
+ .block_erase = spi_block_erase_20,
+ }, {
+ .eraseblocks = { {32 * 1024, 8} },
+ .block_erase = spi_block_erase_52,
+ }, {
+ .eraseblocks = { {64 * 1024, 4} },
+ .block_erase = spi_block_erase_d8,
+ }, {
+ .eraseblocks = { {256, 1024} },
+ .block_erase = spi_block_erase_81,
+ }
+ },
+ .printlock = spi_prettyprint_status_register_plain,
+ .unlock = spi_disable_blockprotect,
+ .write = spi_chip_write_256,
+ .read = spi_chip_read,
+ .voltage = {2300, 3600},
+ },
+
+ {
.vendor = "SST",
.name = "SST25LF020A",
.bustype = BUS_SPI,
diff --git a/flashchips.h b/flashchips.h
index e190dca..5ec26ab 100644
--- a/flashchips.h
+++ b/flashchips.h
@@ -621,6 +621,9 @@
#define PMC_PM49FL002 0x6D
#define PMC_PM49FL004 0x6E
+#define PUYA_ID 0x85
+#define PUYA_P25D21H 0x4012
+
/*
* The Sanyo chip found so far uses SPI, first byte is manufacturer code,
* second byte is the device code,
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