Attention is currently required from: Anastasia Klimchuk, Angel Pons, Artur Kowalski.

View Change

1 comment:

• Patchset:

  • Patch Set #4:

    A thread on the mailing list adding the same chip: https://mail.coreboot. […]

    The datasheet specifies the set in the ML patch

    SE (sector erase) 20 (hex) ADD1 ADD2 ADD3

    BE 32K (block erase 32KB) 52 (hex) ADD1 ADD2 ADD3

    BE (block erase 64KB) D8 (hex) ADD1 ADD2 ADD3

    CE (chip erase) 60 or C7 (hex)

To view, visit change 68557. To unsubscribe, or for help writing mail filters, visit settings.