Edward O'Callaghan has uploaded this change for review.

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flashrom.c: Rewrite prepare_chip_access() 4BA enablement

Factor out the 4BA enablement logic into its own function and
break down predicates into a series of easy to follow base-cases
complete with comments.

TEST=`$ sudo ./flashrom -p internal -r /tmp/bios`.
on a Found chipset "Intel Tiger Lake U Premium".

Change-Id: I10a426331cb2a3485e3dd786fa771e20870cbd84
Signed-off-by: Edward O'Callaghan <quasisec@google.com>
---
M flashrom.c
1 file changed, 57 insertions(+), 24 deletions(-)

git pull ssh://review.coreboot.org:29418/flashrom refs/changes/42/71742/1
diff --git a/flashrom.c b/flashrom.c
index 822594b..f7499c3 100644
--- a/flashrom.c
+++ b/flashrom.c
@@ -1905,6 +1905,45 @@
return 0;
}

+static int enable_4ba_if_required(struct flashctx *const flash)
+{
+ /* Check if chip too small to need 4BA. */
+ if (flash->chip->total_size <= 16 * 1024) {
+ return 0;
+ }
+
+ /* Check if SPI bus with 4BA enabled has a SPI master missing 4BA mode. */
+ if (!spi_master_no_4ba_modes(flash)) {
+ return 0;
+ }
+
+ /* Check if SPI bus with 4BA has a SPI master that supports a 4BA mode. */
+ if (!spi_master_4ba(flash)) {
+ msg_cerr("Programmer doesn't support this chip. Aborting.\n");
+ return 1;
+ }
+
+ /* Check chip supports native 4BA instructions and if not bail out. */
+ if ((flash->chip->feature_bits & FEATURE_4BA_NATIVE) != FEATURE_4BA_NATIVE) {
+ msg_cerr("Chip does not support 4BA Native instructions. Aborting.\n");
+ return 1;
+ }
+
+ /* Check if chip is on a chipbus that supports 4BA addressing mode. */
+ if (!spi_chip_4ba(flash)) {
+ return 0;
+ }
+
+ /* Enable/disable 4-byte addressing mode. */
+ int ret = spi_master_4ba(flash) ? spi_enter_4ba(flash): spi_exit_4ba(flash);
+ if (ret) {
+ msg_cerr("Failed to set correct 4BA mode! Aborting.\n");
+ return 1;
+ }
+
+ return 0;
+}
+
int prepare_flash_access(struct flashctx *const flash,
const bool read_it, const bool write_it,
const bool erase_it, const bool verify_it)
@@ -1933,30 +1972,7 @@
flash->address_high_byte = -1;
flash->in_4ba_mode = false;

- /* Be careful about 4BA chips and broken masters */
- if (flash->chip->total_size > 16 * 1024 && spi_master_no_4ba_modes(flash)) {
- /* If we can't use native instructions, bail out */
- if ((flash->chip->feature_bits & FEATURE_4BA_NATIVE) != FEATURE_4BA_NATIVE
- || !spi_master_4ba(flash)) {
- msg_cerr("Programmer doesn't support this chip. Aborting.\n");
- return 1;
- }
- }
-
- /* Enable/disable 4-byte addressing mode if flash chip supports it */
- if (spi_chip_4ba(flash)) {
- int ret;
- if (spi_master_4ba(flash))
- ret = spi_enter_4ba(flash);
- else
- ret = spi_exit_4ba(flash);
- if (ret) {
- msg_cerr("Failed to set correct 4BA mode! Aborting.\n");
- return 1;
- }
- }
-
- return 0;
+ return enable_4ba_if_required(flash);
}

void finalize_flash_access(struct flashctx *const flash)

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Gerrit-Project: flashrom
Gerrit-Branch: master
Gerrit-Change-Id: I10a426331cb2a3485e3dd786fa771e20870cbd84
Gerrit-Change-Number: 71742
Gerrit-PatchSet: 1
Gerrit-Owner: Edward O'Callaghan <quasisec@chromium.org>
Gerrit-MessageType: newchange