Edward O'Callaghan submitted this change.

View Change



3 is the latest approved patch-set.
No files were changed between the latest approved patch-set and the submitted one.

Approvals: build bot (Jenkins): Verified Angel Pons: Looks good to me, but someone else must approve Anastasia Klimchuk: Looks good to me, approved
internal.c: Move sio register to own object

While super i/o is related to the internal programmer it
isn't actually _the_ internal programmer. Move register
logic to its own object consistent with other programmer
types.

Change-Id: I9a4c3e12bce5d22492c8d1b8f4a3f49d736dcf31
Signed-off-by: Edward O'Callaghan <quasisec@google.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/71577
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Anastasia Klimchuk <aklm@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
---
M Makefile
M internal.c
M meson.build
A superio.c
4 files changed, 63 insertions(+), 29 deletions(-)

diff --git a/Makefile b/Makefile
index a7ab00b..2ebd370 100644
--- a/Makefile
+++ b/Makefile
@@ -584,7 +584,7 @@
ifeq ($(CONFIG_INTERNAL) $(CONFIG_INTERNAL_X86), yes yes)
FEATURE_FLAGS += -D'CONFIG_INTERNAL=1'
PROGRAMMER_OBJS += processor_enable.o chipset_enable.o board_enable.o cbtable.o \
- internal.o it87spi.o sb600spi.o amd_imc.o wbsio_spi.o mcp6x_spi.o \
+ internal.o it87spi.o sb600spi.o superio.o amd_imc.o wbsio_spi.o mcp6x_spi.o \
ichspi.o dmi.o known_boards.o
ACTIVE_PROGRAMMERS += internal
endif
diff --git a/internal.c b/internal.c
index 808039d..c5fdb74 100644
--- a/internal.c
+++ b/internal.c
@@ -34,34 +34,6 @@

enum chipbustype internal_buses_supported = BUS_NONE;

-#if defined(__i386__) || defined(__x86_64__)
-void probe_superio(void)
-{
- probe_superio_winbond();
- /* ITE probe causes SMSC LPC47N217 to power off the serial UART.
- * Always probe for SMSC first, and if a SMSC Super I/O is detected
- * at a given I/O port, do _not_ probe that port with the ITE probe.
- * This means SMSC probing must be done before ITE probing.
- */
- //probe_superio_smsc();
- probe_superio_ite();
-}
-
-int superio_count = 0;
-#define SUPERIO_MAX_COUNT 3
-
-struct superio superios[SUPERIO_MAX_COUNT];
-
-int register_superio(struct superio s)
-{
- if (superio_count == SUPERIO_MAX_COUNT)
- return 1;
- superios[superio_count++] = s;
- return 0;
-}
-
-#endif
-
static void internal_chip_writeb(const struct flashctx *flash, uint8_t val,
chipaddr addr)
{
diff --git a/meson.build b/meson.build
index 36cb4f8..57ac438 100644
--- a/meson.build
+++ b/meson.build
@@ -247,6 +247,7 @@
'internal.c',
'it87spi.c',
'sb600spi.c',
+ 'superio.c',
'amd_imc.c',
'wbsio_spi.c',
'mcp6x_spi.c',
diff --git a/superio.c b/superio.c
new file mode 100644
index 0000000..3121578
--- /dev/null
+++ b/superio.c
@@ -0,0 +1,42 @@
+/*
+ * This file is part of the flashrom project.
+ *
+ * Copyright (C) 2009 Carl-Daniel Hailfinger
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include "programmer.h"
+
+int superio_count = 0;
+#define SUPERIO_MAX_COUNT 3
+
+struct superio superios[SUPERIO_MAX_COUNT];
+
+int register_superio(struct superio s)
+{
+ if (superio_count == SUPERIO_MAX_COUNT)
+ return 1;
+ superios[superio_count++] = s;
+ return 0;
+}
+
+void probe_superio(void)
+{
+ probe_superio_winbond();
+ /* ITE probe causes SMSC LPC47N217 to power off the serial UART.
+ * Always probe for SMSC first, and if a SMSC Super I/O is detected
+ * at a given I/O port, do _not_ probe that port with the ITE probe.
+ * This means SMSC probing must be done before ITE probing.
+ */
+ //probe_superio_smsc();
+ probe_superio_ite();
+}

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Gerrit-Project: flashrom
Gerrit-Branch: master
Gerrit-Change-Id: I9a4c3e12bce5d22492c8d1b8f4a3f49d736dcf31
Gerrit-Change-Number: 71577
Gerrit-PatchSet: 5
Gerrit-Owner: Edward O'Callaghan <quasisec@chromium.org>
Gerrit-Reviewer: Anastasia Klimchuk <aklm@chromium.org>
Gerrit-Reviewer: Angel Pons <th3fanbus@gmail.com>
Gerrit-Reviewer: Edward O'Callaghan <quasisec@chromium.org>
Gerrit-Reviewer: Thomas Heijligen <src@posteo.de>
Gerrit-Reviewer: build bot (Jenkins) <no-reply@coreboot.org>
Gerrit-MessageType: merged