Gabriel Tremblay has uploaded this change for review.

View Change

Reverted typo

Change-Id: I0b3b31b918776df077cf1d3e3377e35f1cd0c25a
---
M flashchips.c
1 file changed, 10 insertions(+), 2 deletions(-)

git pull ssh://review.coreboot.org:29418/flashrom refs/changes/12/70212/1

diff --git a/flashchips.c b/flashchips.c
index 7a12dec..b3fa85e 100644
--- a/flashchips.c
+++ b/flashchips.c
@@ -8708,8 +8708,7 @@
 			}
 		},
 		.printlock	= SPI_PRETTYPRINT_STATUS_REGISTER_BP3_SRWD, /* bit6 is quad enable */
-		/*.unlock		= SPI_DISABLE_BLOCKPROTECT_BP3_SRWD,*/
-                .unlock		= SPI_DISABLE_BLOCKPROTECT,
+		.unlock		= SPI_DISABLE_BLOCKPROTECT_BP3_SRWD,
 		.write		= SPI_CHIP_WRITE256,
 		.read		= SPI_CHIP_READ, /* Fast read (0x0B) and multi I/O supported */
 		.voltage	= {2700, 3600},

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