I was able to test this and it works with one small change (see comments).
I used an SF600 with firmware 7.2.21, with W25Q256JVFM and MX25L25735FMI and wrote to 1MB ranges in the lower and upper halves of the chip.
Patch set 1:Code-Review -1
1 comment:
Patch Set #1, Line 399: data_packet[3] = WRITE_MODE_4B_ADDR_256B_PAGE_PGM_0x12
For some reason I cannot explain, this needs to be WRITE_MODE_4B_ADDR_256B_PAGE_PGM. That is the only way I have been able to successfully write using native 4BA commands.
I am not sure what WRITE_MODE_4B_ADDR_256B_PAGE_PGM_0x12 is supposed to do...
To view, visit change 28804. To unsubscribe, or for help writing mail filters, visit settings.