Edward O'Callaghan has uploaded this change for review.

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flashchips.c: Add writeprotect to selected chips

These chips are the ones tested in the ChromiumOS Flashrom
fork so we are just upstreaming those at the moment.

BUG=b:153800563
BRANCH=none
TEST=builds

Change-Id: I90c34ff9c34ff40fa186244024614c40954f4498
Signed-off-by: Edward O'Callaghan <quasisec@google.com>
---
M flashchips.c
1 file changed, 6 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/flashrom refs/changes/52/45752/1
diff --git a/flashchips.c b/flashchips.c
index 7d10abf..7ece354 100644
--- a/flashchips.c
+++ b/flashchips.c
@@ -21,6 +21,7 @@
#include "flash.h"
#include "flashchips.h"
#include "chipdrivers.h"
+#include "writeprotect.h"

/**
* List of supported flash chips.
@@ -5959,6 +5960,7 @@
.write = spi_chip_write_256,
.read = spi_chip_read, /* Fast read (0x0B) and multi I/O supported */
.voltage = {1695, 1950},
+ .wp = &wp_generic,
},

{
@@ -6396,6 +6398,7 @@
.write = spi_chip_write_256,
.read = spi_chip_read, /* Fast read (0x0B) and multi I/O supported */
.voltage = {2700, 3600},
+ .wp = &wp_generic,
},

{
@@ -8277,6 +8280,7 @@
.write = spi_chip_write_256,
.read = spi_chip_read, /* Fast read (0x0B) supported */
.voltage = {2700, 3600},
+ .wp = &wp_generic,
},

{
@@ -8613,6 +8617,7 @@
.write = spi_chip_write_256,
.read = spi_chip_read, /* Fast read (0x0B) supported */
.voltage = {2700, 3600},
+ .wp = &wp_generic,
},

{
@@ -8767,6 +8772,7 @@
.write = spi_chip_write_256,
.read = spi_chip_read, /* Fast read (0x0B) and multi I/O supported */
.voltage = {2700, 3600},
+ .wp = &wp_generic,
},

{

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Gerrit-Project: flashrom
Gerrit-Branch: master
Gerrit-Change-Id: I90c34ff9c34ff40fa186244024614c40954f4498
Gerrit-Change-Number: 45752
Gerrit-PatchSet: 1
Gerrit-Owner: Edward O'Callaghan <quasisec@chromium.org>
Gerrit-MessageType: newchange