Edward O'Callaghan has uploaded this change for review.

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util/flashchips_db_jsoniser: Add wp decoding

Change-Id: I4badbdbf5a5745f1e7de17b72136dee1ef791d76
Signed-off-by: Edward O'Callaghan <quasisec@google.com>
---
M util/flashchips_db_jsoniser/main.c
1 file changed, 115 insertions(+), 1 deletion(-)

git pull ssh://review.coreboot.org:29418/flashrom refs/changes/74/74074/1
diff --git a/util/flashchips_db_jsoniser/main.c b/util/flashchips_db_jsoniser/main.c
index 829e58e..2366296 100644
--- a/util/flashchips_db_jsoniser/main.c
+++ b/util/flashchips_db_jsoniser/main.c
@@ -223,6 +223,107 @@

return NULL;
}
+
+static char *decode_flash_reg(enum flash_reg reg)
+{
+ switch (reg) {
+ case INVALID_REG: return "INVALID_REG";
+ case STATUS1: return "STATUS1";
+ case STATUS2: return "STATUS2";
+ case STATUS3: return "STATUS3";
+ case SECURITY: return "SECURITY";
+ case CONFIG: return "CONFIG";
+ case MAX_REGISTERS: return "MAX_REGISTERS";
+ }
+ return NULL;
+};
+
+static char *decode_writability(int w)
+{
+ switch (w) {
+ case RO: return "RO";
+ case RW: return "RW";
+ case OTP: return "OTP";
+ }
+ return NULL;
+}
+
+static void decode_reg_bit_info(const char *name, struct reg_bit_info info, bool indent)
+{
+ if (indent) putchar('\t');
+ if (name) printf("\t\"%s\": {\n", name); else printf("\t{\n");
+
+ if (indent) putchar('\t');
+ /* Register containing the bit */
+ printf("\t\t\"reg\": \"%s\",\n", decode_flash_reg(info.reg));
+
+ if (indent) putchar('\t');
+ /* Bit index within register */
+ printf("\t\t\"bit_index\": %d,\n", info.bit_index);
+
+ if (indent) putchar('\t');
+ /*
+ * Writability of the bit. RW does not guarantee the bit will be
+ * writable, for example if status register protection is enabled.
+ */
+ printf("\t\t\"writability\": \"%s\"\n", decode_writability(info.writability));
+
+ if (indent) putchar('\t');
+ printf("\t}");
+};
+
+static void decode_reg_bit_map(struct reg_bit_map map)
+{
+ printf("\"reg_bits\": {\n");
+
+ /* Status register protection bit (SRP) */
+ decode_reg_bit_info("srp", map.srp, false);
+ printf(",\n");
+
+ /* Status register lock bit (SRP) */
+ decode_reg_bit_info("srl", map.srl, false);
+ printf(",\n");
+
+ /*
+ * Note: some datasheets refer to configuration bits that
+ * function like TB/SEC/CMP bits as BP bits (e.g. BP3 for a bit
+ * that functions like TB).
+ *
+ * As a convention, any config bit that functions like a
+ * TB/SEC/CMP bit should be assigned to the respective
+ * tb/sec/cmp field in this structure, even if the datasheet
+ * uses a different name.
+ */
+
+ /* Block protection bits (BP) */
+ /* Extra element for terminator */
+//struct reg_bit_info bp[MAX_BP_BITS + 1];
+ printf("\t\"bp\": [\n");
+ for (unsigned int i = 0; i < MAX_BP_BITS + 1; i++) {
+ if (i) printf(",\n");
+ decode_reg_bit_info(NULL, map.bp[i], true);
+ }
+ printf("\n\t],\n");
+
+ /* Top/bottom protection bit (TB) */
+ decode_reg_bit_info("tb", map.tb, false);
+ printf(",\n");
+
+ /* Sector/block protection bit (SEC) */
+ decode_reg_bit_info("srp", map.srp, false);
+ printf(",\n");
+
+ /* Complement bit (CMP) */
+ decode_reg_bit_info("cmp", map.cmp, false);
+ printf(",\n");
+
+ /* Write Protect Selection (per sector protection when set) */
+ decode_reg_bit_info("wps", map.wps, false);
+ printf("\n");
+
+ printf("}\n");
+}
+
int main()
{
printf("{\n\t\t\"flashchips\": [\n");
@@ -287,10 +388,13 @@
printf("\t\t\t\t\"voltage\": [\n");
printf("\t\t\t\t\t{ \"min\": %d },\n", flashchips[i].voltage.min);
printf("\t\t\t\t\t{ \"max\": %d }\n", flashchips[i].voltage.max);
- printf("\t\t\t\t]\n");
+ printf("\t\t\t\t],\n");

// enum write_granularity gran;

+ // reg_bits
+ decode_reg_bit_map(flashchips[i].reg_bits);
+
printf("\n\t\t\t}\n");
}


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Gerrit-Project: flashrom
Gerrit-Branch: master
Gerrit-Change-Id: I4badbdbf5a5745f1e7de17b72136dee1ef791d76
Gerrit-Change-Number: 74074
Gerrit-PatchSet: 1
Gerrit-Owner: Edward O'Callaghan <quasisec@chromium.org>
Gerrit-MessageType: newchange