Subrata Banik has uploaded this change for review.
ichspi: Add support for Ice Lake
This patch adds Ice Lake support into flashrom.
Additionally, utilize MSL (MCH Strap Length) to uniquely detect the
chipset when the ICCRIBA (ICC Reg. Init Base Addr) field default
value (0x34) on Ice Lake is the same as Cannon Lake.
BUG=b:227115361
TEST=Flashrom is able to detect ICL SPI DID and show chipset name as
below:
> flashrom --flash-name
....
Found chipset "Intel Ice Lake"
.....
> flashrom - internal --ifd -i fd -i bios -r /tmp/bios.rom
....
Reading ich_descriptor...done.
Assuming chipset '400 series Ice Point'.
Using regions: "bios", "fd".
Reading flash... done.
SUCCESS
Signed-off-by: Subrata Banik <subratabanik@google.com>
Change-Id: If000b152c6e454617a7ad0245d16f8b1dea97fa0
---
M chipset_enable.c
M ich_descriptors.c
M ichspi.c
M programmer.h
M util/ich_descriptors_tool/ich_descriptors_tool.c
5 files changed, 41 insertions(+), 8 deletions(-)
git pull ssh://review.coreboot.org:29418/flashrom refs/changes/84/63584/1
diff --git a/chipset_enable.c b/chipset_enable.c
index b050f64..0ab97b2 100644
--- a/chipset_enable.c
+++ b/chipset_enable.c
@@ -604,6 +604,7 @@
case CHIPSET_C620_SERIES_LEWISBURG:
case CHIPSET_300_SERIES_CANNON_POINT:
case CHIPSET_400_SERIES_COMET_POINT:
+ case CHIPSET_400_SERIES_ICE_POINT:
case CHIPSET_500_SERIES_TIGER_POINT:
case CHIPSET_600_SERIES_ALDER_POINT:
case CHIPSET_METEOR_LAKE:
@@ -708,6 +709,7 @@
case CHIPSET_C620_SERIES_LEWISBURG:
case CHIPSET_300_SERIES_CANNON_POINT:
case CHIPSET_400_SERIES_COMET_POINT:
+ case CHIPSET_400_SERIES_ICE_POINT:
boot_straps = boot_straps_pch8_lp;
break;
case CHIPSET_500_SERIES_TIGER_POINT:
@@ -744,6 +746,7 @@
case CHIPSET_C620_SERIES_LEWISBURG:
case CHIPSET_300_SERIES_CANNON_POINT:
case CHIPSET_400_SERIES_COMET_POINT:
+ case CHIPSET_400_SERIES_ICE_POINT:
case CHIPSET_500_SERIES_TIGER_POINT:
case CHIPSET_600_SERIES_ALDER_POINT:
case CHIPSET_METEOR_LAKE:
@@ -992,7 +995,10 @@
static int enable_flash_pch400(struct pci_dev *const dev, const char *const name)
{
- return enable_flash_pch100_or_c620(dev, name, 0x1f, 5, CHIPSET_400_SERIES_COMET_POINT);
+ if (strcmp(name, "Ice Lake") == 0)
+ return enable_flash_pch100_or_c620(dev, name, 0x1f, 5, CHIPSET_400_SERIES_ICE_POINT);
+ else
+ return enable_flash_pch100_or_c620(dev, name, 0x1f, 5, CHIPSET_400_SERIES_COMET_POINT);
}
static int enable_flash_pch500(struct pci_dev *const dev, const char *const name)
@@ -2140,7 +2146,7 @@
{0x8086, 0xa30c, B_S, NT, "Intel", "QM370", enable_flash_pch300},
{0x8086, 0xa30d, B_S, NT, "Intel", "HM370", enable_flash_pch300},
{0x8086, 0xa30e, B_S, DEP, "Intel", "CM246", enable_flash_pch300},
- {0x8086, 0x3482, B_S, DEP, "Intel", "Ice Lake U Premium", enable_flash_pch300},
+ {0x8086, 0x34a4, B_S, DEP, "Intel", "Ice Lake", enable_flash_pch400},
{0x8086, 0x0684, B_S, NT, "Intel", "H470", enable_flash_pch400},
{0x8086, 0x0685, B_S, NT, "Intel", "Z490", enable_flash_pch400},
{0x8086, 0x0687, B_S, NT, "Intel", "Q470", enable_flash_pch400},
diff --git a/ich_descriptors.c b/ich_descriptors.c
index 4d85e08..640de57 100644
--- a/ich_descriptors.c
+++ b/ich_descriptors.c
@@ -45,6 +45,7 @@
case CHIPSET_C620_SERIES_LEWISBURG:
case CHIPSET_300_SERIES_CANNON_POINT:
case CHIPSET_400_SERIES_COMET_POINT:
+ case CHIPSET_400_SERIES_ICE_POINT:
case CHIPSET_500_SERIES_TIGER_POINT:
case CHIPSET_600_SERIES_ALDER_POINT:
case CHIPSET_METEOR_LAKE:
@@ -114,7 +115,7 @@
"5 series Ibex Peak", "6 series Cougar Point", "7 series Panther Point",
"8 series Lynx Point", "Baytrail", "8 series Lynx Point LP", "8 series Wellsburg",
"9 series Wildcat Point", "9 series Wildcat Point LP", "100 series Sunrise Point",
- "C620 series Lewisburg", "300 series Cannon Point", "400 series Comet Point",
+ "C620 series Lewisburg", "300 series Cannon Point", "400 series Comet Point", "400 series Ice Point",
"500 series Tiger Point", "600 series Alder Point", "Meteor Lake", "Apollo Lake", "Gemini Lake", "Elkhart Lake",
};
if (cs < CHIPSET_ICH8 || cs - CHIPSET_ICH8 + 1 >= ARRAY_SIZE(chipset_names))
@@ -209,6 +210,7 @@
case CHIPSET_C620_SERIES_LEWISBURG:
case CHIPSET_300_SERIES_CANNON_POINT:
case CHIPSET_400_SERIES_COMET_POINT:
+ case CHIPSET_400_SERIES_ICE_POINT:
case CHIPSET_500_SERIES_TIGER_POINT:
case CHIPSET_600_SERIES_ALDER_POINT:
case CHIPSET_METEOR_LAKE:
@@ -301,6 +303,7 @@
case CHIPSET_C620_SERIES_LEWISBURG:
case CHIPSET_300_SERIES_CANNON_POINT:
case CHIPSET_400_SERIES_COMET_POINT:
+ case CHIPSET_400_SERIES_ICE_POINT:
return freq_str[1][value];
case CHIPSET_APOLLO_LAKE:
case CHIPSET_GEMINI_LAKE:
@@ -333,6 +336,7 @@
switch (cs) {
case CHIPSET_300_SERIES_CANNON_POINT:
case CHIPSET_400_SERIES_COMET_POINT:
+ case CHIPSET_400_SERIES_ICE_POINT:
msg_pdbg2("eSPI/EC Bus Clock Frequency: %s\n", freq_str[0][value]);
return;
case CHIPSET_500_SERIES_TIGER_POINT:
@@ -353,6 +357,7 @@
case CHIPSET_C620_SERIES_LEWISBURG:
case CHIPSET_300_SERIES_CANNON_POINT:
case CHIPSET_400_SERIES_COMET_POINT:
+ case CHIPSET_400_SERIES_ICE_POINT:
case CHIPSET_500_SERIES_TIGER_POINT:
case CHIPSET_600_SERIES_ALDER_POINT:
case CHIPSET_METEOR_LAKE:
@@ -480,6 +485,7 @@
if (cs == CHIPSET_100_SERIES_SUNRISE_POINT ||
cs == CHIPSET_300_SERIES_CANNON_POINT ||
cs == CHIPSET_400_SERIES_COMET_POINT ||
+ cs == CHIPSET_400_SERIES_ICE_POINT ||
cs == CHIPSET_500_SERIES_TIGER_POINT ||
cs == CHIPSET_600_SERIES_ALDER_POINT ||
cs == CHIPSET_METEOR_LAKE) {
@@ -1040,8 +1046,12 @@
warn_peculiar_desc("100 series");
return CHIPSET_100_SERIES_SUNRISE_POINT;
} else {
- if (content->ICCRIBA == 0x34)
- return CHIPSET_300_SERIES_CANNON_POINT;
+ if (content->ICCRIBA == 0x34) {
+ if (content->MSL == 0x03)
+ return CHIPSET_400_SERIES_ICE_POINT;
+ else
+ return CHIPSET_300_SERIES_CANNON_POINT;
+ }
if (content->CSSL == 0x11)
return CHIPSET_500_SERIES_TIGER_POINT;
if (content->CSSL == 0x14)
@@ -1072,6 +1082,7 @@
switch (guess) {
case CHIPSET_300_SERIES_CANNON_POINT:
case CHIPSET_400_SERIES_COMET_POINT:
+ case CHIPSET_400_SERIES_ICE_POINT:
case CHIPSET_500_SERIES_TIGER_POINT:
case CHIPSET_600_SERIES_ALDER_POINT:
case CHIPSET_METEOR_LAKE:
@@ -1230,6 +1241,7 @@
case CHIPSET_C620_SERIES_LEWISBURG:
case CHIPSET_300_SERIES_CANNON_POINT:
case CHIPSET_400_SERIES_COMET_POINT:
+ case CHIPSET_400_SERIES_ICE_POINT:
case CHIPSET_500_SERIES_TIGER_POINT:
case CHIPSET_600_SERIES_ALDER_POINT:
case CHIPSET_METEOR_LAKE:
@@ -1271,6 +1283,7 @@
case CHIPSET_C620_SERIES_LEWISBURG:
case CHIPSET_300_SERIES_CANNON_POINT:
case CHIPSET_400_SERIES_COMET_POINT:
+ case CHIPSET_400_SERIES_ICE_POINT:
case CHIPSET_500_SERIES_TIGER_POINT:
case CHIPSET_600_SERIES_ALDER_POINT:
case CHIPSET_METEOR_LAKE:
diff --git a/ichspi.c b/ichspi.c
index a377247..7a0c6fd 100644
--- a/ichspi.c
+++ b/ichspi.c
@@ -426,6 +426,7 @@
case CHIPSET_C620_SERIES_LEWISBURG:
case CHIPSET_300_SERIES_CANNON_POINT:
case CHIPSET_400_SERIES_COMET_POINT:
+ case CHIPSET_400_SERIES_ICE_POINT:
case CHIPSET_500_SERIES_TIGER_POINT:
case CHIPSET_ELKHART_LAKE:
break;
@@ -439,6 +440,7 @@
case CHIPSET_C620_SERIES_LEWISBURG:
case CHIPSET_300_SERIES_CANNON_POINT:
case CHIPSET_400_SERIES_COMET_POINT:
+ case CHIPSET_400_SERIES_ICE_POINT:
case CHIPSET_500_SERIES_TIGER_POINT:
case CHIPSET_ELKHART_LAKE:
pprint_reg(HSFS, PRR34_LOCKDN, reg_val, ", ");
@@ -461,6 +463,7 @@
case CHIPSET_C620_SERIES_LEWISBURG:
case CHIPSET_300_SERIES_CANNON_POINT:
case CHIPSET_400_SERIES_COMET_POINT:
+ case CHIPSET_400_SERIES_ICE_POINT:
case CHIPSET_500_SERIES_TIGER_POINT:
case CHIPSET_ELKHART_LAKE:
_pprint_reg(HSFC, PCH100_HSFC_FCYCLE, PCH100_HSFC_FCYCLE_OFF, reg_val, ", ");
@@ -1797,6 +1800,7 @@
case CHIPSET_C620_SERIES_LEWISBURG:
case CHIPSET_300_SERIES_CANNON_POINT:
case CHIPSET_400_SERIES_COMET_POINT:
+ case CHIPSET_400_SERIES_ICE_POINT:
case CHIPSET_500_SERIES_TIGER_POINT:
case CHIPSET_600_SERIES_ALDER_POINT:
case CHIPSET_METEOR_LAKE:
@@ -1835,6 +1839,7 @@
break;
case CHIPSET_300_SERIES_CANNON_POINT:
case CHIPSET_400_SERIES_COMET_POINT:
+ case CHIPSET_400_SERIES_ICE_POINT:
case CHIPSET_500_SERIES_TIGER_POINT:
case CHIPSET_600_SERIES_ALDER_POINT:
case CHIPSET_METEOR_LAKE:
@@ -1895,6 +1900,7 @@
case CHIPSET_C620_SERIES_LEWISBURG:
case CHIPSET_300_SERIES_CANNON_POINT:
case CHIPSET_400_SERIES_COMET_POINT:
+ case CHIPSET_400_SERIES_ICE_POINT:
case CHIPSET_500_SERIES_TIGER_POINT:
case CHIPSET_600_SERIES_ALDER_POINT:
case CHIPSET_METEOR_LAKE:
@@ -1974,6 +1980,7 @@
case CHIPSET_C620_SERIES_LEWISBURG:
case CHIPSET_300_SERIES_CANNON_POINT:
case CHIPSET_400_SERIES_COMET_POINT:
+ case CHIPSET_400_SERIES_ICE_POINT:
case CHIPSET_500_SERIES_TIGER_POINT:
case CHIPSET_600_SERIES_ALDER_POINT:
case CHIPSET_METEOR_LAKE:
@@ -2012,6 +2019,7 @@
case CHIPSET_C620_SERIES_LEWISBURG:
case CHIPSET_300_SERIES_CANNON_POINT:
case CHIPSET_400_SERIES_COMET_POINT:
+ case CHIPSET_400_SERIES_ICE_POINT:
case CHIPSET_500_SERIES_TIGER_POINT:
case CHIPSET_600_SERIES_ALDER_POINT:
case CHIPSET_METEOR_LAKE:
@@ -2049,6 +2057,7 @@
(ich_gen == CHIPSET_100_SERIES_SUNRISE_POINT ||
ich_gen == CHIPSET_300_SERIES_CANNON_POINT ||
ich_gen == CHIPSET_400_SERIES_COMET_POINT ||
+ ich_gen == CHIPSET_400_SERIES_ICE_POINT ||
ich_gen == CHIPSET_500_SERIES_TIGER_POINT ||
ich_gen == CHIPSET_600_SERIES_ALDER_POINT)) {
msg_pdbg("Enabling hardware sequencing by default for 100+ series PCH.\n");
diff --git a/programmer.h b/programmer.h
index 47d2dc3..78d7d59 100644
--- a/programmer.h
+++ b/programmer.h
@@ -350,6 +350,7 @@
CHIPSET_C620_SERIES_LEWISBURG,
CHIPSET_300_SERIES_CANNON_POINT,
CHIPSET_400_SERIES_COMET_POINT,
+ CHIPSET_400_SERIES_ICE_POINT,
CHIPSET_500_SERIES_TIGER_POINT,
CHIPSET_600_SERIES_ALDER_POINT,
CHIPSET_METEOR_LAKE,
diff --git a/util/ich_descriptors_tool/ich_descriptors_tool.c b/util/ich_descriptors_tool/ich_descriptors_tool.c
index 13a1897..e844ae4 100644
--- a/util/ich_descriptors_tool/ich_descriptors_tool.c
+++ b/util/ich_descriptors_tool/ich_descriptors_tool.c
@@ -137,6 +137,7 @@
"\t- \"100\" or \"sunrise\" for Intel's 100 series chipsets.\n"
"\t- \"300\" or \"cannon\" for Intel's 300 series chipsets.\n"
"\t- \"400\" or \"comet\" for Intel's 400 series chipsets.\n"
+"\t- \"400\" or \"ice\" for Intel's 400 series chipsets.\n"
"\t- \"500\" or \"tiger\" for Intel's 500 series chipsets.\n"
"\t- \"600\" or \"alder\" for Intel's 600 series chipsets.\n"
"If '-d' is specified some regions such as the BIOS image as seen by the CPU or\n"
@@ -230,9 +231,12 @@
else if ((strcmp(csn, "300") == 0) ||
(strcmp(csn, "cannon") == 0))
cs = CHIPSET_300_SERIES_CANNON_POINT;
- else if ((strcmp(csn, "400") == 0) ||
- (strcmp(csn, "comet") == 0))
- cs = CHIPSET_400_SERIES_COMET_POINT;
+ else if (strcmp(csn, "400") == 0) {
+ if (strcmp(csn, "comet") == 0)
+ cs = CHIPSET_400_SERIES_COMET_POINT;
+ else if (strcmp(csn, "ice") == 0)
+ cs = CHIPSET_400_SERIES_ICE_POINT;
+ }
else if ((strcmp(csn, "500") == 0) ||
(strcmp(csn, "tiger") == 0))
cs = CHIPSET_500_SERIES_TIGER_POINT;
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