Anastasia Klimchuk submitted this change.

View Change

flashchips: Add definitions for Fudan FM25Q04, FM25Q64 and FM25Q128

These chips have the exact same characteristics as their 8/16/32 counterparts,
except for the different flash size.

Relevant datasheets (I've also included the FM25Q32 as a reference):
* https://www.fmsh.com/nvm/FM25Q04_ds_eng.pdf
* https://www.fmsh.com/nvm/FM25Q32_ds_eng.pdf
* https://www.fmsh.com/nvm/FM25Q64_ds_eng.pdf
* https://www.fmsh.com/nvm/FM25Q128_ds_eng.pdf

Testing status will be updated in a subsequent commit.

Change-Id: I88fcc2bbb9706c8adb3722da6aa0e1d2d04c3fde
Signed-off-by: Samantaz Fox <coding@samantaz.fr>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/83969
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Anastasia Klimchuk <aklm@chromium.org>
---
M flashchips.c
M include/flashchips.h
2 files changed, 135 insertions(+), 0 deletions(-)

diff --git a/flashchips.c b/flashchips.c
index a498ded..e842ebe 100644
--- a/flashchips.c
+++ b/flashchips.c
@@ -6186,6 +6186,50 @@
 
 	{
 		.vendor		= "Fudan",
+		.name		= "FM25Q04",
+		.bustype	= BUS_SPI,
+		.manufacture_id	= FUDAN_ID_NOPREFIX,
+		.model_id	= FUDAN_FM25Q04,
+		.total_size	= 512,
+		.page_size	= 256,
+		/* supports SFDP */
+		/* QPI enable 0x38, disable 0xFF */
+		.feature_bits	= FEATURE_WRSR_WREN | FEATURE_OTP | FEATURE_QPI,
+		.tested		= TEST_UNTESTED,
+		.probe		= PROBE_SPI_RDID,
+		.probe_timing	= TIMING_ZERO,
+		.block_erasers	= {
+			{
+				/* 128 * 4KB sectors */
+				.eraseblocks = { {4 * 1024, 128} },
+				.block_erase = SPI_BLOCK_ERASE_20,
+			}, {
+				/* 16 * 32KB blocks */
+				.eraseblocks = { {32 * 1024, 16} },
+				.block_erase = SPI_BLOCK_ERASE_52,
+			}, {
+				/* 8 * 64KB blocks  */
+				.eraseblocks = { {64 * 1024, 8} },
+				.block_erase = SPI_BLOCK_ERASE_D8,
+			}, {
+				/* Full chip erase (0x60)  */
+				.eraseblocks = { {512 * 1024, 1} },
+				.block_erase = SPI_BLOCK_ERASE_60,
+			}, {
+				/* Full chip erase (0xC7)  */
+				.eraseblocks = { {512 * 1024, 1} },
+				.block_erase = SPI_BLOCK_ERASE_C7,
+			},
+		},
+		.printlock	= SPI_PRETTYPRINT_STATUS_REGISTER_BP2_TB_BPL,
+		.unlock		= SPI_DISABLE_BLOCKPROTECT_BP2_SRWD,
+		.write		= SPI_CHIP_WRITE256,
+		.read		= SPI_CHIP_READ, /* Fast read (0x0B) and multi I/O supported */
+		.voltage	= {2700, 3600},
+	},
+
+	{
+		.vendor		= "Fudan",
 		.name		= "FM25Q08",
 		.bustype	= BUS_SPI,
 		.manufacture_id	= FUDAN_ID_NOPREFIX,
@@ -6305,6 +6349,94 @@
 	},
 
 	{
+		.vendor		= "Fudan",
+		.name		= "FM25Q64",
+		.bustype	= BUS_SPI,
+		.manufacture_id	= FUDAN_ID_NOPREFIX,
+		.model_id	= FUDAN_FM25Q64,
+		.total_size	= 8192,
+		.page_size	= 256,
+		/* supports SFDP */
+		/* QPI enable 0x38, disable 0xFF */
+		.feature_bits	= FEATURE_WRSR_WREN | FEATURE_OTP | FEATURE_QPI,
+		.tested		= TEST_UNTESTED,
+		.probe		= PROBE_SPI_RDID,
+		.probe_timing	= TIMING_ZERO,
+		.block_erasers	= {
+			{
+				/* 2048 * 4KB sectors */
+				.eraseblocks = { {4 * 1024, 2048} },
+				.block_erase = SPI_BLOCK_ERASE_20,
+			}, {
+				/* 256 * 32KB blocks */
+				.eraseblocks = { {32 * 1024, 256} },
+				.block_erase = SPI_BLOCK_ERASE_52,
+			}, {
+				/* 128 * 64KB blocks  */
+				.eraseblocks = { {64 * 1024, 128} },
+				.block_erase = SPI_BLOCK_ERASE_D8,
+			}, {
+				/* Full chip erase (0x60)  */
+				.eraseblocks = { {8 * 1024 * 1024, 1} },
+				.block_erase = SPI_BLOCK_ERASE_60,
+			}, {
+				/* Full chip erase (0xC7)  */
+				.eraseblocks = { {8 * 1024 * 1024, 1} },
+				.block_erase = SPI_BLOCK_ERASE_C7,
+			},
+		},
+		.printlock	= SPI_PRETTYPRINT_STATUS_REGISTER_BP2_TB_BPL, /* bit6 selects size of protected blocks; TODO: SR2 */
+		.unlock		= SPI_DISABLE_BLOCKPROTECT_BP2_SRWD,
+		.write		= SPI_CHIP_WRITE256,
+		.read		= SPI_CHIP_READ, /* Fast read (0x0B) and multi I/O supported */
+		.voltage	= {2700, 3600},
+	},
+
+	{
+		.vendor		= "Fudan",
+		.name		= "FM25Q128",
+		.bustype	= BUS_SPI,
+		.manufacture_id	= FUDAN_ID_NOPREFIX,
+		.model_id	= FUDAN_FM25Q128,
+		.total_size	= 16384,
+		.page_size	= 256,
+		/* supports SFDP */
+		/* QPI enable 0x38, disable 0xFF */
+		.feature_bits	= FEATURE_WRSR_WREN | FEATURE_OTP | FEATURE_QPI,
+		.tested		= TEST_UNTESTED,
+		.probe		= PROBE_SPI_RDID,
+		.probe_timing	= TIMING_ZERO,
+		.block_erasers	= {
+			{
+				/* 4096 * 4KB sectors */
+				.eraseblocks = { {4 * 1024, 4096} },
+				.block_erase = SPI_BLOCK_ERASE_20,
+			}, {
+				/* 512 * 32KB blocks */
+				.eraseblocks = { {32 * 1024, 512} },
+				.block_erase = SPI_BLOCK_ERASE_52,
+			}, {
+				/* 256 * 64KB blocks  */
+				.eraseblocks = { {64 * 1024, 256} },
+				.block_erase = SPI_BLOCK_ERASE_D8,
+			}, {
+				/* Full chip erase (0x60)  */
+				.eraseblocks = { {16 * 1024 * 1024, 1} },
+				.block_erase = SPI_BLOCK_ERASE_60,
+			}, {
+				/* Full chip erase (0xC7)  */
+				.eraseblocks = { {16 * 1024 * 1024, 1} },
+				.block_erase = SPI_BLOCK_ERASE_C7,
+			},
+		},
+		.printlock	= SPI_PRETTYPRINT_STATUS_REGISTER_BP2_TB_BPL, /* bit6 selects size of protected blocks; TODO: SR2 */
+		.unlock		= SPI_DISABLE_BLOCKPROTECT_BP2_SRWD,
+		.write		= SPI_CHIP_WRITE256,
+		.read		= SPI_CHIP_READ, /* Fast read (0x0B) and multi I/O supported */
+		.voltage	= {2700, 3600},
+	},
+
+	{
 		.vendor		= "Fujitsu",
 		.name		= "MBM29F004BC",
 		.bustype	= BUS_PARALLEL,
diff --git a/include/flashchips.h b/include/flashchips.h
index e4d0bca..02de72a 100644
--- a/include/flashchips.h
+++ b/include/flashchips.h
@@ -344,9 +344,12 @@
 #define FUDAN_FM25F01		0x3111
 #define FUDAN_FM25F02		0x3112	/* Same as FM25F02A */
 #define FUDAN_FM25F04		0x3113	/* Same as FM25F04A */
+#define FUDAN_FM25Q04		0x4013
 #define FUDAN_FM25Q08		0x4014
 #define FUDAN_FM25Q16		0x4015
 #define FUDAN_FM25Q32		0x4016
+#define FUDAN_FM25Q64		0x4017
+#define FUDAN_FM25Q128		0x4018
 
 #define FUJITSU_ID		0x04	/* Fujitsu */
 #define FUJITSU_MBM29DL400BC	0x0F

To view, visit change 83969. To unsubscribe, or for help writing mail filters, visit settings.