Attention is currently required from: Xiang W, Edward O'Callaghan, Angel Pons.

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1 comment:

• File bitbang_spi.c:

  • Patch Set #26, Line 121:

    			programmer_delay(master->half_period);
    			bitbang_spi_set_sck_set_mosi(master, !cpol, (val >> i) & 1);
    			programmer_delay(master->half_period);
    			bitbang_spi_set_sck(master, cpol);
    

    This does not look right and is probably what led to the follow up commit.
    With cpha=0, the receiver is supposed to sample the data at the first edge.
    So the sequence should be:

    • set mosi
    • delay
    • first edge
    • delay
    • second edge
    • (followed without delay by the next mosi setting)

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