Chen has uploaded this change for review.

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spi: add cs=tms option to jlink_spi programmer

Currently, the code assumes the nCS pin of spi nor flash is connected to
either nRESET(pin 15) or nTRST(pin 3). But it is incompatible with the
pinout from official JFlash SPI, whereas the nCS pin is wired to TMS(pin
7).

This commit adds cs=tms option to share the same pinout as JFlash SPI.
It works by toggling TMS in assert_cs and deassert_cs, and sets TMS to
zero in jlink_spi_send_command. The default option is set to cs=reset
for backward compatibility.

Change-Id: I0cb467fcc2c403a25f260462de0cd020e7022bb1
Signed-off-by: Jiajie Chen <c@jia.je>
---
M jlink_spi.c
1 file changed, 58 insertions(+), 13 deletions(-)

git pull ssh://review.coreboot.org:29418/flashrom refs/changes/11/75011/1

diff --git a/jlink_spi.c b/jlink_spi.c
index af61fb5..1d6ad9b 100644
--- a/jlink_spi.c
+++ b/jlink_spi.c
@@ -51,10 +51,16 @@
 /* Minimum target voltage required for operation in mV. */
 #define MIN_TARGET_VOLTAGE	1200
 
+enum cs_wiring {
+	CS_RESET, /* nCS is wired to nRESET(pin 15) */
+	CS_TRST, /* nCS is wired to nTRST(pin 3) */
+	CS_TMS, /* nCS is wired to TMS/nCS(pin 7) */
+};
+
 struct jlink_spi_data {
 	struct jaylink_context *ctx;
 	struct jaylink_device_handle *devh;
-	bool reset_cs;
+	enum cs_wiring cs;
 	bool enable_target_power;
 };
 
@@ -62,20 +68,27 @@
 {
 	int ret;
 
-	if (jlink_data->reset_cs) {
+	if (jlink_data->cs == CS_RESET) {
 		ret = jaylink_clear_reset(jlink_data->devh);
 
 		if (ret != JAYLINK_OK) {
 			msg_perr("jaylink_clear_reset() failed: %s.\n", jaylink_strerror(ret));
 			return false;
 		}
-	} else {
+	} else if (jlink_data->cs == CS_TRST) {
 		ret = jaylink_jtag_clear_trst(jlink_data->devh);
 
 		if (ret != JAYLINK_OK) {
 			msg_perr("jaylink_jtag_clear_trst() failed: %s.\n", jaylink_strerror(ret));
 			return false;
 		}
+	} else {
+		ret = jaylink_jtag_clear_tms(jlink_data->devh);
+
+		if (ret != JAYLINK_OK) {
+			msg_perr("jaylink_jtag_clear_tms() failed: %s.\n", jaylink_strerror(ret));
+			return false;
+		}
 	}
 
 	return true;
@@ -85,20 +98,27 @@
 {
 	int ret;
 
-	if (jlink_data->reset_cs) {
+	if (jlink_data->cs == CS_RESET) {
 		ret = jaylink_set_reset(jlink_data->devh);
 
 		if (ret != JAYLINK_OK) {
 			msg_perr("jaylink_set_reset() failed: %s.\n", jaylink_strerror(ret));
 			return false;
 		}
-	} else {
+	} else if (jlink_data->cs == CS_TRST) {
 		ret = jaylink_jtag_set_trst(jlink_data->devh);
 
 		if (ret != JAYLINK_OK) {
 			msg_perr("jaylink_jtag_set_trst() failed: %s.\n", jaylink_strerror(ret));
 			return false;
 		}
+	} else {
+		ret = jaylink_jtag_set_tms(jlink_data->devh);
+
+		if (ret != JAYLINK_OK) {
+			msg_perr("jaylink_jtag_set_tms() failed: %s.\n", jaylink_strerror(ret));
+			return false;
+		}
 	}
 
 	return true;
@@ -109,6 +129,7 @@
 {
 	uint32_t length;
 	uint8_t *buffer;
+	static const uint8_t tms_buffer[JTAG_MAX_TRANSFER_SIZE] = {0};
 	struct jlink_spi_data *jlink_data = flash->mst->spi.data;
 
 	length = writecnt + readcnt;
@@ -136,7 +157,7 @@
 	int ret;
 
 	ret = jaylink_jtag_io(jlink_data->devh,
-				buffer, buffer, buffer, length * 8, JAYLINK_JTAG_VERSION_2);
+				tms_buffer, buffer, buffer, length * 8, JAYLINK_JTAG_VERSION_2);
 
 	if (ret != JAYLINK_OK) {
 		msg_perr("jaylink_jtag_io() failed: %s.\n", jaylink_strerror(ret));
@@ -196,7 +217,7 @@
 	unsigned long speed = 0;
 	struct jaylink_context *jaylink_ctx = NULL;
 	struct jaylink_device_handle *jaylink_devh = NULL;
-	bool reset_cs;
+	enum cs_wiring cs;
 	struct jlink_spi_data *jlink_data = NULL;
 	bool enable_target_power;
 
@@ -255,14 +276,16 @@
 
 	free(arg);
 
-	reset_cs = true;
+	cs = CS_RESET;
 	arg = extract_programmer_param_str(cfg, "cs");
 
 	if (arg) {
 		if (!strcasecmp(arg, "reset")) {
-			reset_cs = true;
+			cs = CS_RESET;
 		} else if (!strcasecmp(arg, "trst")) {
-			reset_cs = false;
+			cs = CS_TRST;
+		} else if (!strcasecmp(arg, "tms")) {
+			cs = CS_TMS;
 		} else {
 			msg_perr("Invalid chip select pin specified: '%s'.\n", arg);
 			free(arg);
@@ -272,10 +295,12 @@
 
 	free(arg);
 
-	if (reset_cs)
+	if (cs == CS_RESET)
 		msg_pdbg("Using RESET as chip select signal.\n");
-	else
+	else if (cs == CS_TRST)
 		msg_pdbg("Using TRST as chip select signal.\n");
+	else
+		msg_pdbg("Using TMS/CS as chip select signal.\n");
 
 	enable_target_power = false;
 	arg = extract_programmer_param_str(cfg, "power");
@@ -506,7 +531,7 @@
 	/* jaylink_ctx, jaylink_devh are allocated by jaylink_init and jaylink_open */
 	jlink_data->ctx = jaylink_ctx;
 	jlink_data->devh = jaylink_devh;
-	jlink_data->reset_cs = reset_cs;
+	jlink_data->cs = cs;
 	jlink_data->enable_target_power = enable_target_power;
 
 	/* Ensure that the CS signal is not active initially. */

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