Anastasia Klimchuk submitted this change.
ichspi: Add RaptorPoint PCH support
Based on public Intel 700 Series PCH datasheet, DOC 743835 rev 004.
The IDs of IoT chipset SKUs (ending with E) can only be found in "12th
Gen Intel® Core™ Processors Family (Formerly Known as Alder Lake -S)
for IoT Platforms External Design Specification (EDS) Addendum" DOC
634528 rev 2.7 (NDA).
TEST=Probe flash on Z790 chipset. Run the ich_descriptors_tool and
check the output is correct as expected.
Change-Id: I13ac52d5400c0e2260e12d605077fc2182c379ef
Signed-off-by: Michał Żygowski <michal.zygowski@3mdeb.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/83854
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Anastasia Klimchuk <aklm@chromium.org>
Reviewed-by: Sergii Dmytruk <sergii.dmytruk@3mdeb.com>
---
M chipset_enable.c
M doc/release_notes/devel.rst
M ich_descriptors.c
M ichspi.c
M include/programmer.h
M util/ich_descriptors_tool/ich_descriptors_tool.c
6 files changed, 45 insertions(+), 2 deletions(-)
diff --git a/chipset_enable.c b/chipset_enable.c
index 9f0a0bb..2adc425 100644
--- a/chipset_enable.c
+++ b/chipset_enable.c
@@ -606,6 +606,7 @@
case CHIPSET_400_SERIES_COMET_POINT:
case CHIPSET_500_SERIES_TIGER_POINT:
case CHIPSET_600_SERIES_ALDER_POINT:
+ case CHIPSET_700_SERIES_RAPTOR_POINT:
case CHIPSET_METEOR_LAKE:
case CHIPSET_PANTHER_LAKE:
case CHIPSET_ELKHART_LAKE:
@@ -714,6 +715,7 @@
break;
case CHIPSET_500_SERIES_TIGER_POINT:
case CHIPSET_600_SERIES_ALDER_POINT:
+ case CHIPSET_700_SERIES_RAPTOR_POINT:
case CHIPSET_C740_SERIES_EMMITSBURG:
case CHIPSET_METEOR_LAKE:
case CHIPSET_PANTHER_LAKE:
@@ -751,6 +753,7 @@
case CHIPSET_400_SERIES_COMET_POINT:
case CHIPSET_500_SERIES_TIGER_POINT:
case CHIPSET_600_SERIES_ALDER_POINT:
+ case CHIPSET_700_SERIES_RAPTOR_POINT:
case CHIPSET_METEOR_LAKE:
case CHIPSET_PANTHER_LAKE:
case CHIPSET_APOLLO_LAKE:
@@ -1023,6 +1026,11 @@
return enable_flash_pch100_or_c620(cfg, dev, name, 0x1f, 5, CHIPSET_600_SERIES_ALDER_POINT);
}
+static int enable_flash_pch700(const struct programmer_cfg *cfg, struct pci_dev *const dev, const char *const name)
+{
+ return enable_flash_pch100_or_c620(cfg, dev, name, 0x1f, 5, CHIPSET_700_SERIES_RAPTOR_POINT);
+}
+
static int enable_flash_mtl(const struct programmer_cfg *cfg, struct pci_dev *const dev, const char *const name)
{
return enable_flash_pch100_or_c620(cfg, dev, name, 0x1f, 5, CHIPSET_METEOR_LAKE);
@@ -2196,9 +2204,19 @@
{0x8086, 0x7a83, B_S, NT, "Intel", "Q670", enable_flash_pch600},
{0x8086, 0x7a84, B_S, DEP, "Intel", "Z690", enable_flash_pch600},
{0x8086, 0x7a88, B_S, NT, "Intel", "W680", enable_flash_pch600},
- {0x8086, 0x7a8a, B_S, NT, "Intel", "W685", enable_flash_pch600},
{0x8086, 0x7a8d, B_S, NT, "Intel", "WM690", enable_flash_pch600},
{0x8086, 0x7a8c, B_S, NT, "Intel", "HM670", enable_flash_pch600},
+ {0x8086, 0x7a90, B_S, NT, "Intel", "R680E", enable_flash_pch600},
+ {0x8086, 0x7a91, B_S, NT, "Intel", "Q670E", enable_flash_pch600},
+ {0x8086, 0x7a92, B_S, NT, "Intel", "H610E", enable_flash_pch600},
+ {0x8086, 0x7a8a, B_S, NT, "Intel", "W790", enable_flash_pch700},
+ {0x8086, 0x7a04, B_S, DEP, "Intel", "Z790", enable_flash_pch700},
+ {0x8086, 0x7a05, B_S, NT, "Intel", "H770", enable_flash_pch700},
+ {0x8086, 0x7a06, B_S, NT, "Intel", "B760", enable_flash_pch700},
+ {0x8086, 0x7a0c, B_S, NT, "Intel", "HM770", enable_flash_pch700},
+ {0x8086, 0x7a0d, B_S, NT, "Intel", "WM790", enable_flash_pch700},
+ {0x8086, 0x7a14, B_S, NT, "Intel", "C262", enable_flash_pch700},
+ {0x8086, 0x7a13, B_S, NT, "Intel", "C266", enable_flash_pch700},
{0x8086, 0x7e23, B_S, DEP, "Intel", "Meteor Lake-P/M", enable_flash_mtl},
{0x8086, 0xe323, B_S, DEP, "Intel", "Panther Lake-U/H 12Xe", enable_flash_ptl},
{0x8086, 0xe423, B_S, DEP, "Intel", "Panther Lake-H 4Xe", enable_flash_ptl},
diff --git a/doc/release_notes/devel.rst b/doc/release_notes/devel.rst
index 5243f7c..919d364 100644
--- a/doc/release_notes/devel.rst
+++ b/doc/release_notes/devel.rst
@@ -31,3 +31,7 @@
The ECAM has been supported for a very long time, most platforms should support
it. For those platforms don't support ECAM, libpci will terminate the process by
exit.
+
+Chipset support
+===============
+Added Raptor Point PCH support.
diff --git a/ich_descriptors.c b/ich_descriptors.c
index eaf44b0..c436fab 100644
--- a/ich_descriptors.c
+++ b/ich_descriptors.c
@@ -49,6 +49,7 @@
case CHIPSET_400_SERIES_COMET_POINT:
case CHIPSET_500_SERIES_TIGER_POINT:
case CHIPSET_600_SERIES_ALDER_POINT:
+ case CHIPSET_700_SERIES_RAPTOR_POINT:
case CHIPSET_METEOR_LAKE:
case CHIPSET_PANTHER_LAKE:
case CHIPSET_ELKHART_LAKE:
@@ -80,6 +81,7 @@
case CHIPSET_C740_SERIES_EMMITSBURG:
case CHIPSET_APOLLO_LAKE:
case CHIPSET_600_SERIES_ALDER_POINT:
+ case CHIPSET_700_SERIES_RAPTOR_POINT:
case CHIPSET_METEOR_LAKE:
case CHIPSET_PANTHER_LAKE:
case CHIPSET_GEMINI_LAKE:
@@ -221,6 +223,7 @@
case CHIPSET_400_SERIES_COMET_POINT:
case CHIPSET_500_SERIES_TIGER_POINT:
case CHIPSET_600_SERIES_ALDER_POINT:
+ case CHIPSET_700_SERIES_RAPTOR_POINT:
case CHIPSET_METEOR_LAKE:
case CHIPSET_PANTHER_LAKE:
case CHIPSET_APOLLO_LAKE:
@@ -320,6 +323,7 @@
return freq_str[2][value];
case CHIPSET_500_SERIES_TIGER_POINT:
case CHIPSET_600_SERIES_ALDER_POINT:
+ case CHIPSET_700_SERIES_RAPTOR_POINT:
case CHIPSET_C740_SERIES_EMMITSBURG:
case CHIPSET_METEOR_LAKE:
case CHIPSET_PANTHER_LAKE:
@@ -371,6 +375,7 @@
case CHIPSET_400_SERIES_COMET_POINT:
case CHIPSET_500_SERIES_TIGER_POINT:
case CHIPSET_600_SERIES_ALDER_POINT:
+ case CHIPSET_700_SERIES_RAPTOR_POINT:
case CHIPSET_METEOR_LAKE:
case CHIPSET_PANTHER_LAKE:
case CHIPSET_APOLLO_LAKE:
@@ -512,6 +517,7 @@
cs == CHIPSET_400_SERIES_COMET_POINT ||
cs == CHIPSET_500_SERIES_TIGER_POINT ||
cs == CHIPSET_600_SERIES_ALDER_POINT ||
+ cs == CHIPSET_700_SERIES_RAPTOR_POINT ||
cs == CHIPSET_C740_SERIES_EMMITSBURG ||
cs == CHIPSET_JASPER_LAKE ||
cs == CHIPSET_METEOR_LAKE ||
@@ -1115,6 +1121,7 @@
case CHIPSET_400_SERIES_COMET_POINT:
case CHIPSET_500_SERIES_TIGER_POINT:
case CHIPSET_600_SERIES_ALDER_POINT:
+ case CHIPSET_700_SERIES_RAPTOR_POINT:
case CHIPSET_METEOR_LAKE:
case CHIPSET_PANTHER_LAKE:
case CHIPSET_GEMINI_LAKE:
@@ -1277,6 +1284,7 @@
case CHIPSET_400_SERIES_COMET_POINT:
case CHIPSET_500_SERIES_TIGER_POINT:
case CHIPSET_600_SERIES_ALDER_POINT:
+ case CHIPSET_700_SERIES_RAPTOR_POINT:
case CHIPSET_METEOR_LAKE:
case CHIPSET_PANTHER_LAKE:
case CHIPSET_APOLLO_LAKE:
@@ -1324,6 +1332,7 @@
case CHIPSET_400_SERIES_COMET_POINT:
case CHIPSET_500_SERIES_TIGER_POINT:
case CHIPSET_600_SERIES_ALDER_POINT:
+ case CHIPSET_700_SERIES_RAPTOR_POINT:
case CHIPSET_METEOR_LAKE:
case CHIPSET_PANTHER_LAKE:
case CHIPSET_APOLLO_LAKE:
diff --git a/ichspi.c b/ichspi.c
index f74fb05..d01f2f3 100644
--- a/ichspi.c
+++ b/ichspi.c
@@ -2106,6 +2106,7 @@
case CHIPSET_400_SERIES_COMET_POINT:
case CHIPSET_500_SERIES_TIGER_POINT:
case CHIPSET_600_SERIES_ALDER_POINT:
+ case CHIPSET_700_SERIES_RAPTOR_POINT:
case CHIPSET_APOLLO_LAKE:
case CHIPSET_GEMINI_LAKE:
case CHIPSET_JASPER_LAKE:
@@ -2147,6 +2148,7 @@
case CHIPSET_400_SERIES_COMET_POINT:
case CHIPSET_500_SERIES_TIGER_POINT:
case CHIPSET_600_SERIES_ALDER_POINT:
+ case CHIPSET_700_SERIES_RAPTOR_POINT:
case CHIPSET_APOLLO_LAKE:
case CHIPSET_GEMINI_LAKE:
case CHIPSET_JASPER_LAKE:
@@ -2210,6 +2212,7 @@
case CHIPSET_400_SERIES_COMET_POINT:
case CHIPSET_500_SERIES_TIGER_POINT:
case CHIPSET_600_SERIES_ALDER_POINT:
+ case CHIPSET_700_SERIES_RAPTOR_POINT:
case CHIPSET_APOLLO_LAKE:
case CHIPSET_GEMINI_LAKE:
case CHIPSET_JASPER_LAKE:
@@ -2291,6 +2294,7 @@
case CHIPSET_400_SERIES_COMET_POINT:
case CHIPSET_500_SERIES_TIGER_POINT:
case CHIPSET_600_SERIES_ALDER_POINT:
+ case CHIPSET_700_SERIES_RAPTOR_POINT:
case CHIPSET_APOLLO_LAKE:
case CHIPSET_GEMINI_LAKE:
case CHIPSET_JASPER_LAKE:
@@ -2332,6 +2336,7 @@
case CHIPSET_400_SERIES_COMET_POINT:
case CHIPSET_500_SERIES_TIGER_POINT:
case CHIPSET_600_SERIES_ALDER_POINT:
+ case CHIPSET_700_SERIES_RAPTOR_POINT:
case CHIPSET_APOLLO_LAKE:
case CHIPSET_GEMINI_LAKE:
case CHIPSET_JASPER_LAKE:
@@ -2371,6 +2376,7 @@
ich_gen == CHIPSET_400_SERIES_COMET_POINT ||
ich_gen == CHIPSET_500_SERIES_TIGER_POINT ||
ich_gen == CHIPSET_600_SERIES_ALDER_POINT ||
+ ich_gen == CHIPSET_700_SERIES_RAPTOR_POINT ||
ich_gen == CHIPSET_C740_SERIES_EMMITSBURG)) {
msg_pdbg("Enabling hardware sequencing by default for 100+ series PCH.\n");
ich_spi_mode = ich_hwseq;
diff --git a/include/programmer.h b/include/programmer.h
index 77e79ae..5ed9c8a 100644
--- a/include/programmer.h
+++ b/include/programmer.h
@@ -355,6 +355,7 @@
CHIPSET_400_SERIES_COMET_POINT,
CHIPSET_500_SERIES_TIGER_POINT,
CHIPSET_600_SERIES_ALDER_POINT,
+ CHIPSET_700_SERIES_RAPTOR_POINT,
CHIPSET_APOLLO_LAKE,
CHIPSET_GEMINI_LAKE,
CHIPSET_JASPER_LAKE,
diff --git a/util/ich_descriptors_tool/ich_descriptors_tool.c b/util/ich_descriptors_tool/ich_descriptors_tool.c
index 09587f7..ec77a88 100644
--- a/util/ich_descriptors_tool/ich_descriptors_tool.c
+++ b/util/ich_descriptors_tool/ich_descriptors_tool.c
@@ -140,6 +140,7 @@
"\t- \"400\" or \"comet\" for Intel's 400 series chipsets.\n"
"\t- \"500\" or \"tiger\" for Intel's 500 series chipsets.\n"
"\t- \"600\" or \"alder\" for Intel's 600 series chipsets.\n"
+"\t- \"700\" or \"raptor\" for Intel's 700 series chipsets.\n"
"If '-d' is specified some regions such as the BIOS image as seen by the CPU or\n"
"the GbE blob that is required to initialize the GbE are also dumped to files.\n",
argv[0], argv[0]);
@@ -237,8 +238,12 @@
else if ((strcmp(csn, "500") == 0) ||
(strcmp(csn, "tiger") == 0))
cs = CHIPSET_500_SERIES_TIGER_POINT;
- else if (strcmp(csn, "600") == 0)
+ else if ((strcmp(csn, "600") == 0) ||
+ (strcmp(csn, "alder") == 0))
cs = CHIPSET_600_SERIES_ALDER_POINT;
+ else if ((strcmp(csn, "700") == 0) ||
+ (strcmp(csn, "raptor") == 0))
+ cs = CHIPSET_700_SERIES_RAPTOR_POINT;
else if (strcmp(csn, "apollo") == 0)
cs = CHIPSET_APOLLO_LAKE;
else if (strcmp(csn, "gemini") == 0)
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