Edward O'Callaghan submitted this change.

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2 is the latest approved patch-set.
No files were changed between the latest approved patch-set and the submitted one.

Approvals: build bot (Jenkins): Verified Thomas Heijligen: Looks good to me, approved Anastasia Klimchuk: Looks good to me, approved
internal: Move parallel logic into internal_par implementation

The parallel internal programmer is its own implementation. Move
it and call into it from the top-level internal.c programmer
implementation.

Change-Id: Idabeceb59a36680f5fbb45d3ee4bd5dbf837373b
Signed-off-by: Edward O'Callaghan <quasisec@google.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/71834
Reviewed-by: Anastasia Klimchuk <aklm@chromium.org>
Reviewed-by: Thomas Heijligen <src@posteo.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
---
M Makefile
M include/programmer.h
M internal.c
A internal_par.c
M meson.build
5 files changed, 105 insertions(+), 60 deletions(-)

diff --git a/Makefile b/Makefile
index b37e807..16af214 100644
--- a/Makefile
+++ b/Makefile
@@ -584,14 +584,14 @@
ifeq ($(CONFIG_INTERNAL) $(CONFIG_INTERNAL_X86), yes yes)
FEATURE_FLAGS += -D'CONFIG_INTERNAL=1'
PROGRAMMER_OBJS += processor_enable.o chipset_enable.o board_enable.o cbtable.o \
- internal.o it87spi.o sb600spi.o superio.o amd_imc.o wbsio_spi.o mcp6x_spi.o \
+ internal.o internal_par.o it87spi.o sb600spi.o superio.o amd_imc.o wbsio_spi.o mcp6x_spi.o \
ichspi.o dmi.o known_boards.o
ACTIVE_PROGRAMMERS += internal
endif
else
ifeq ($(CONFIG_INTERNAL), yes)
FEATURE_FLAGS += -D'CONFIG_INTERNAL=1'
-PROGRAMMER_OBJS += processor_enable.o chipset_enable.o board_enable.o cbtable.o internal.o known_boards.o
+PROGRAMMER_OBJS += processor_enable.o chipset_enable.o board_enable.o cbtable.o internal.o internal_par.o known_boards.o
ACTIVE_PROGRAMMERS += internal
endif
endif
diff --git a/include/programmer.h b/include/programmer.h
index db32b2c..2a4ca76 100644
--- a/include/programmer.h
+++ b/include/programmer.h
@@ -387,7 +387,8 @@
/* mcp6x_spi.c */
int mcp6x_spi_init(int want_spi);

-
+/* internal_par.c */
+void internal_par_init(enum chipbustype buses);

/* sb600spi.c */
int sb600_probe_spi(const struct programmer_cfg *cfg, struct pci_dev *dev);
diff --git a/internal.c b/internal.c
index 07126bf..c75b472 100644
--- a/internal.c
+++ b/internal.c
@@ -18,9 +18,9 @@
#include <string.h>
#include <stdbool.h>
#include <stdlib.h>
+
#include "flash.h"
#include "programmer.h"
-#include "hwaccess_physmap.h"
#include "platform/pci.h"

#if defined(__i386__) || defined(__x86_64__)
@@ -34,60 +34,6 @@

enum chipbustype internal_buses_supported = BUS_NONE;

-static void internal_chip_writeb(const struct flashctx *flash, uint8_t val,
- chipaddr addr)
-{
- mmio_writeb(val, (void *) addr);
-}
-
-static void internal_chip_writew(const struct flashctx *flash, uint16_t val,
- chipaddr addr)
-{
- mmio_writew(val, (void *) addr);
-}
-
-static void internal_chip_writel(const struct flashctx *flash, uint32_t val,
- chipaddr addr)
-{
- mmio_writel(val, (void *) addr);
-}
-
-static uint8_t internal_chip_readb(const struct flashctx *flash,
- const chipaddr addr)
-{
- return mmio_readb((void *) addr);
-}
-
-static uint16_t internal_chip_readw(const struct flashctx *flash,
- const chipaddr addr)
-{
- return mmio_readw((void *) addr);
-}
-
-static uint32_t internal_chip_readl(const struct flashctx *flash,
- const chipaddr addr)
-{
- return mmio_readl((void *) addr);
-}
-
-static void internal_chip_readn(const struct flashctx *flash, uint8_t *buf,
- const chipaddr addr, size_t len)
-{
- mmio_readn((void *)addr, buf, len);
- return;
-}
-
-static const struct par_master par_master_internal = {
- .map_flash_region = physmap,
- .unmap_flash_region = physunmap,
- .chip_readb = internal_chip_readb,
- .chip_readw = internal_chip_readw,
- .chip_readl = internal_chip_readl,
- .chip_readn = internal_chip_readn,
- .chip_writeb = internal_chip_writeb,
- .chip_writew = internal_chip_writew,
- .chip_writel = internal_chip_writel,
-};

static int get_params(const struct programmer_cfg *cfg,
bool *boardenable, bool *boardmismatch,
@@ -309,8 +255,7 @@
}
#endif

- if (internal_buses_supported & BUS_NONSPI)
- register_par_master(&par_master_internal, internal_buses_supported, NULL);
+ internal_par_init(internal_buses_supported);

/* Report if a non-whitelisted laptop is detected that likely uses a legacy bus. */
report_nonwl_laptop_detected(is_laptop, laptop_ok);
diff --git a/internal_par.c b/internal_par.c
new file mode 100644
index 0000000..e8e387c
--- /dev/null
+++ b/internal_par.c
@@ -0,0 +1,79 @@
+/*
+ * This file is part of the flashrom project.
+ *
+ * Copyright (C) 2009 Carl-Daniel Hailfinger
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include "programmer.h"
+#include "hwaccess_physmap.h"
+
+static void internal_chip_writeb(const struct flashctx *flash, uint8_t val,
+ chipaddr addr)
+{
+ mmio_writeb(val, (void *) addr);
+}
+
+static void internal_chip_writew(const struct flashctx *flash, uint16_t val,
+ chipaddr addr)
+{
+ mmio_writew(val, (void *) addr);
+}
+
+static void internal_chip_writel(const struct flashctx *flash, uint32_t val,
+ chipaddr addr)
+{
+ mmio_writel(val, (void *) addr);
+}
+
+static uint8_t internal_chip_readb(const struct flashctx *flash,
+ const chipaddr addr)
+{
+ return mmio_readb((void *) addr);
+}
+
+static uint16_t internal_chip_readw(const struct flashctx *flash,
+ const chipaddr addr)
+{
+ return mmio_readw((void *) addr);
+}
+
+static uint32_t internal_chip_readl(const struct flashctx *flash,
+ const chipaddr addr)
+{
+ return mmio_readl((void *) addr);
+}
+
+static void internal_chip_readn(const struct flashctx *flash, uint8_t *buf,
+ const chipaddr addr, size_t len)
+{
+ mmio_readn((void *)addr, buf, len);
+ return;
+}
+
+static const struct par_master par_master_internal = {
+ .map_flash_region = physmap,
+ .unmap_flash_region = physunmap,
+ .chip_readb = internal_chip_readb,
+ .chip_readw = internal_chip_readw,
+ .chip_readl = internal_chip_readl,
+ .chip_readn = internal_chip_readn,
+ .chip_writeb = internal_chip_writeb,
+ .chip_writew = internal_chip_writew,
+ .chip_writel = internal_chip_writel,
+};
+
+void internal_par_init(enum chipbustype buses)
+{
+ if (buses & BUS_NONSPI)
+ register_par_master(&par_master_internal, internal_buses_supported, NULL);
+}
diff --git a/meson.build b/meson.build
index 2575fe1..d78aff9 100644
--- a/meson.build
+++ b/meson.build
@@ -246,6 +246,7 @@
'board_enable.c',
'cbtable.c',
'internal.c',
+ 'internal_par.c',
'it87spi.c',
'sb600spi.c',
'superio.c',
@@ -261,6 +262,7 @@
'cbtable.c',
'chipset_enable.c',
'internal.c',
+ 'internal_par.c',
'processor_enable.c',
'pcidev.c',
'known_boards.c',

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Gerrit-Project: flashrom
Gerrit-Branch: master
Gerrit-Change-Id: Idabeceb59a36680f5fbb45d3ee4bd5dbf837373b
Gerrit-Change-Number: 71834
Gerrit-PatchSet: 5
Gerrit-Owner: Edward O'Callaghan <quasisec@chromium.org>
Gerrit-Reviewer: Anastasia Klimchuk <aklm@chromium.org>
Gerrit-Reviewer: Edward O'Callaghan <quasisec@chromium.org>
Gerrit-Reviewer: Thomas Heijligen <src@posteo.de>
Gerrit-Reviewer: build bot (Jenkins) <no-reply@coreboot.org>
Gerrit-MessageType: merged