Edward O'Callaghan submitted this change.
4 is the latest approved patch-set.
No files were changed between the latest approved patch-set and the submitted one.
tree/: Rename 'internal_delay()' to 'default_delay()'
The non-custom driver programmer delay implementation
'internal_delay()' is unrelated specifically to the
'internal' programmer. The delay implementation is
simply a platform-agnostic host delay implementation.
Therefore, rename to simply default_delay().
Change-Id: I5e04adf16812ceb1480992c92bca25ed80f8897a
Signed-off-by: Edward O'Callaghan <quasisec@google.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/68855
Reviewed-by: Alexander Goncharov <chat@joursoir.net>
Reviewed-by: Felix Singer <felixsinger@posteo.net>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
---
M amd_imc.c
M atavia.c
M bitbang_spi.c
M ch341a_spi.c
M dediprog.c
M dummyflasher.c
M flashrom.c
M ichspi.c
M include/flash.h
M include/programmer.h
M it87spi.c
M nicintel_eeprom.c
M pony_spi.c
M raiden_debug_spi.c
M serial.c
M serprog.c
M udelay.c
M wbsio_spi.c
18 files changed, 66 insertions(+), 46 deletions(-)
diff --git a/amd_imc.c b/amd_imc.c
index 2ee8332..093d42d 100644
--- a/amd_imc.c
+++ b/amd_imc.c
@@ -60,7 +60,7 @@
msg_pwarn("IMC MBOX: Timeout!\n");
return 1;
}
- internal_delay(1000);
+ default_delay(1000);
}
return 0;
}
diff --git a/atavia.c b/atavia.c
index ebf2949..8af52d6 100644
--- a/atavia.c
+++ b/atavia.c
@@ -90,7 +90,7 @@
ready = true;
break;
} else {
- internal_delay(1);
+ default_delay(1);
continue;
}
}
@@ -170,7 +170,7 @@
/* Test if a flash chip is attached. */
pci_write_long(dev, PCI_ROM_ADDRESS, (uint32_t)PCI_ROM_ADDRESS_MASK);
- internal_delay(90);
+ default_delay(90);
uint32_t base = pci_read_long(dev, PCI_ROM_ADDRESS);
msg_pdbg2("BROM base=0x%08x\n", base);
if ((base & PCI_ROM_ADDRESS_MASK) == 0) {
diff --git a/bitbang_spi.c b/bitbang_spi.c
index 71798dc..fadca70 100644
--- a/bitbang_spi.c
+++ b/bitbang_spi.c
@@ -76,10 +76,10 @@
bitbang_spi_set_sck_set_mosi(master, 0, 0, spi_data);
else
bitbang_spi_set_sck(master, 0, spi_data);
- internal_delay(master->half_period);
+ default_delay(master->half_period);
ret <<= 1;
ret |= bitbang_spi_set_sck_get_miso(master, 1, spi_data);
- internal_delay(master->half_period);
+ default_delay(master->half_period);
}
return ret;
}
@@ -90,9 +90,9 @@
for (i = 7; i >= 0; i--) {
bitbang_spi_set_sck_set_mosi(master, 0, (val >> i) & 1, spi_data);
- internal_delay(master->half_period);
+ default_delay(master->half_period);
bitbang_spi_set_sck(master, 1, spi_data);
- internal_delay(master->half_period);
+ default_delay(master->half_period);
}
}
@@ -122,9 +122,9 @@
readarr[i] = bitbang_spi_read_byte(master, data->spi_data);
bitbang_spi_set_sck(master, 0, data->spi_data);
- internal_delay(master->half_period);
+ default_delay(master->half_period);
bitbang_spi_set_cs(master, 1, data->spi_data);
- internal_delay(master->half_period);
+ default_delay(master->half_period);
/* FIXME: Run bitbang_spi_release_bus here or in programmer init? */
bitbang_spi_release_bus(master, data->spi_data);
diff --git a/ch341a_spi.c b/ch341a_spi.c
index 2dc983f..fe18d13 100644
--- a/ch341a_spi.c
+++ b/ch341a_spi.c
@@ -326,10 +326,10 @@
{
/* There is space for 28 bytes instructions of 750 ns each in the CS packet (32 - 4 for the actual CS
* instructions), thus max 21 us, but we avoid getting too near to this boundary and use
- * internal_delay() for durations over 20 us. */
+ * default_delay() for durations over 20 us. */
if ((usecs + stored_delay_us) > 20) {
unsigned int inc = 20 - stored_delay_us;
- internal_delay(usecs - inc);
+ default_delay(usecs - inc);
usecs = inc;
}
stored_delay_us += usecs;
diff --git a/dediprog.c b/dediprog.c
index 6c41f28..723f4a8 100644
--- a/dediprog.c
+++ b/dediprog.c
@@ -316,7 +316,7 @@
if (voltage_selector == 0) {
/* Wait some time as the original driver does. */
- internal_delay(200 * 1000);
+ default_delay(200 * 1000);
}
ret = dediprog_write(dediprog_handle, CMD_SET_VCC, voltage_selector, 0, NULL, 0);
if (ret != 0x0) {
@@ -326,7 +326,7 @@
}
if (voltage_selector != 0) {
/* Wait some time as the original driver does. */
- internal_delay(200 * 1000);
+ default_delay(200 * 1000);
}
return 0;
}
diff --git a/dummyflasher.c b/dummyflasher.c
index f194c10..e5a9c12 100644
--- a/dummyflasher.c
+++ b/dummyflasher.c
@@ -897,7 +897,7 @@
msg_pspew(" 0x%02x", readarr[i]);
msg_pspew("\n");
- internal_delay((writecnt + readcnt) * emu_data->delay_us);
+ default_delay((writecnt + readcnt) * emu_data->delay_us);
return 0;
}
diff --git a/flashrom.c b/flashrom.c
index 18c4864..28201a7 100644
--- a/flashrom.c
+++ b/flashrom.c
@@ -260,18 +260,18 @@
return;
/**
- * Drivers should either use internal_delay() directly or their
+ * Drivers should either use default_delay() directly or their
* own custom delay. Only core flashrom logic calls programmer_delay()
* which should always have a valid flash context. A NULL context
* more than likely indicates a layering violation or BUG however
- * for now dispatch a internal_delay() as a safe default for the NULL
+ * for now dispatch a default_delay() as a safe default for the NULL
* base case.
*/
if (!flash) {
msg_perr("%s called with NULL flash context. "
"Please report a bug at flashrom@flashrom.org\n",
__func__);
- return internal_delay(usecs);
+ return default_delay(usecs);
}
if (flash->mst->buses_supported & BUS_SPI) {
@@ -282,7 +282,7 @@
return flash->mst->par.delay(flash, usecs);
}
- return internal_delay(usecs);
+ return default_delay(usecs);
}
int read_memmapped(struct flashctx *flash, uint8_t *buf, unsigned int start,
diff --git a/ichspi.c b/ichspi.c
index a6587c6..43590d6 100644
--- a/ichspi.c
+++ b/ichspi.c
@@ -875,7 +875,7 @@
timeout = 100 * 60; /* 60 ms are 9.6 million cycles at 16 MHz. */
while ((REGREAD16(ICH7_REG_SPIS) & SPIS_SCIP) && --timeout) {
- internal_delay(10);
+ default_delay(10);
}
if (!timeout) {
msg_perr("Error: SCIP never cleared!\n");
@@ -951,7 +951,7 @@
/* Wait for Cycle Done Status or Flash Cycle Error. */
while (((REGREAD16(ICH7_REG_SPIS) & (SPIS_CDS | SPIS_FCERR)) == 0) &&
--timeout) {
- internal_delay(10);
+ default_delay(10);
}
if (!timeout) {
msg_perr("timeout, ICH7_REG_SPIS=0x%04x\n", REGREAD16(ICH7_REG_SPIS));
@@ -991,7 +991,7 @@
timeout = 100 * 60; /* 60 ms are 9.6 million cycles at 16 MHz. */
while ((REGREAD8(swseq_data.reg_ssfsc) & SSFS_SCIP) && --timeout) {
- internal_delay(10);
+ default_delay(10);
}
if (!timeout) {
msg_perr("Error: SCIP never cleared!\n");
@@ -1071,7 +1071,7 @@
/* Wait for Cycle Done Status or Flash Cycle Error. */
while (((REGREAD32(swseq_data.reg_ssfsc) & (SSFS_FDONE | SSFS_FCERR)) == 0) &&
--timeout) {
- internal_delay(10);
+ default_delay(10);
}
if (!timeout) {
msg_perr("timeout, REG_SSFS=0x%08x\n", REGREAD32(swseq_data.reg_ssfsc));
@@ -1319,7 +1319,7 @@
while ((((hsfs = REGREAD16(ICH9_REG_HSFS)) &
(HSFS_FDONE | HSFS_FCERR)) == 0) &&
--timeout_us) {
- internal_delay(8);
+ default_delay(8);
}
REGWRITE16(ICH9_REG_HSFS, REGREAD16(ICH9_REG_HSFS));
if (!timeout_us) {
diff --git a/include/flash.h b/include/flash.h
index 3f78721..aabc785 100644
--- a/include/flash.h
+++ b/include/flash.h
@@ -60,7 +60,7 @@
const char *descr, uintptr_t phys_addr, size_t len);
void master_unmap_flash_region(const struct registered_master *mast,
void *virt_addr, size_t len);
-/* NOTE: flashctx is not used in internal_delay. In this case, a context should be NULL. */
+/* NOTE: flashctx is not used in default_delay. In this case, a context should be NULL. */
void programmer_delay(const struct flashrom_flashctx *flash, unsigned int usecs);
#define ARRAY_SIZE(a) (sizeof(a) / sizeof((a)[0]))
diff --git a/include/programmer.h b/include/programmer.h
index 8ba5781..aaa1407 100644
--- a/include/programmer.h
+++ b/include/programmer.h
@@ -211,7 +211,7 @@
void myusec_delay(unsigned int usecs);
void myusec_calibrate_delay(void);
void internal_sleep(unsigned int usecs);
-void internal_delay(unsigned int usecs);
+void default_delay(unsigned int usecs);
#if CONFIG_INTERNAL == 1
/* board_enable.c */
diff --git a/it87spi.c b/it87spi.c
index fc29e51..34dbea0 100644
--- a/it87spi.c
+++ b/it87spi.c
@@ -146,7 +146,7 @@
if((status & SPI_SR_WIP) == 0)
return 0;
- internal_delay(1000);
+ default_delay(1000);
}
return 0;
}
diff --git a/nicintel_eeprom.c b/nicintel_eeprom.c
index 6922fb7..80ccd88 100644
--- a/nicintel_eeprom.c
+++ b/nicintel_eeprom.c
@@ -213,7 +213,7 @@
eewr |= BIT(EEWR_CMDV);
pci_mmio_writel(eewr, eebar + EEWR);
- internal_delay(5);
+ default_delay(5);
int i;
for (i = 0; i < MAX_ATTEMPTS; i++)
if (pci_mmio_readl(eebar + EEWR) & BIT(EEWR_DONE))
@@ -338,7 +338,7 @@
nicintel_ee_bitbang(eebar, 0x00, &rdsr);
nicintel_ee_bitset(eebar, EEC, EE_CS, 1);
- internal_delay(1);
+ default_delay(1);
if (!(rdsr & SPI_SR_WIP)) {
return 0;
}
@@ -379,7 +379,7 @@
nicintel_ee_bitset(eebar, EEC, EE_CS, 0);
nicintel_ee_bitbang(eebar, JEDEC_WREN, NULL);
nicintel_ee_bitset(eebar, EEC, EE_CS, 1);
- internal_delay(1);
+ default_delay(1);
/* data */
nicintel_ee_bitset(eebar, EEC, EE_CS, 0);
@@ -394,7 +394,7 @@
break;
}
nicintel_ee_bitset(eebar, EEC, EE_CS, 1);
- internal_delay(1);
+ default_delay(1);
if (nicintel_ee_ready(eebar))
goto out;
}
diff --git a/pony_spi.c b/pony_spi.c
index 408fa12..0647f91 100644
--- a/pony_spi.c
+++ b/pony_spi.c
@@ -244,7 +244,7 @@
for (i = 1; i <= 10; i++) {
data_out = i & 1;
sp_set_pin(PIN_RTS, data_out);
- internal_delay(1000);
+ default_delay(1000);
/* If DSR does not change, we are not connected to what we think */
if (data_out != sp_get_pin(PIN_DSR)) {
diff --git a/raiden_debug_spi.c b/raiden_debug_spi.c
index 2478133..8260abd 100644
--- a/raiden_debug_spi.c
+++ b/raiden_debug_spi.c
@@ -892,7 +892,7 @@
/* Reattempting will not result in a recovery. */
return status;
}
- internal_delay(RETRY_INTERVAL_US);
+ default_delay(RETRY_INTERVAL_US);
continue;
}
@@ -927,7 +927,7 @@
/* Reattempting will not result in a recovery. */
return status;
}
- internal_delay(RETRY_INTERVAL_US);
+ default_delay(RETRY_INTERVAL_US);
}
}
@@ -962,7 +962,7 @@
" config attempt = %d\n"
" status = 0x%05x\n",
config_attempt + 1, status);
- internal_delay(RETRY_INTERVAL_US);
+ default_delay(RETRY_INTERVAL_US);
continue;
}
@@ -972,7 +972,7 @@
" config attempt = %d\n"
" status = 0x%05x\n",
config_attempt + 1, status);
- internal_delay(RETRY_INTERVAL_US);
+ default_delay(RETRY_INTERVAL_US);
continue;
}
@@ -1016,7 +1016,7 @@
config_attempt + 1,
rsp_config.packet_v2.packet_id,
rsp_config.packet_size);
- internal_delay(RETRY_INTERVAL_US);
+ default_delay(RETRY_INTERVAL_US);
}
return USB_SPI_HOST_INIT_FAILURE;
}
@@ -1240,7 +1240,7 @@
/* Reattempting will not result in a recovery. */
return status;
}
- internal_delay(RETRY_INTERVAL_US);
+ default_delay(RETRY_INTERVAL_US);
continue;
}
for (read_attempt = 0; read_attempt < READ_RETRY_ATTEMPTS;
@@ -1277,7 +1277,7 @@
}
/* Device needs to reset its transmit index. */
restart_response_v2(ctx_data);
- internal_delay(RETRY_INTERVAL_US);
+ default_delay(RETRY_INTERVAL_US);
}
}
}
diff --git a/serial.c b/serial.c
index 72f9ef6..a0ef632 100644
--- a/serial.c
+++ b/serial.c
@@ -403,7 +403,7 @@
if (!tmp) {
msg_pdbg2("Empty write\n");
empty_writes--;
- internal_delay(500);
+ default_delay(500);
if (empty_writes == 0) {
msg_perr("Serial port is unresponsive!\n");
return 1;
@@ -510,7 +510,7 @@
ret = 0;
break;
}
- internal_delay(1000); /* 1ms units */
+ default_delay(1000); /* 1ms units */
}
if (really_read != NULL)
*really_read = rd_bytes;
@@ -596,7 +596,7 @@
break;
}
}
- internal_delay(1000); /* 1ms units */
+ default_delay(1000); /* 1ms units */
}
if (really_wrote != NULL)
*really_wrote = wr_bytes;
diff --git a/serprog.c b/serprog.c
index a7796ba..84dfd23 100644
--- a/serprog.c
+++ b/serprog.c
@@ -157,7 +157,7 @@
goto err_out;
}
/* A second should be enough to get all the answers to the buffer */
- internal_delay(1000 * 1000);
+ default_delay(1000 * 1000);
sp_flush_incoming();
/* Then try up to 8 times to send syncnop and get the correct special *
@@ -577,7 +577,7 @@
msg_pspew("%s usecs=%d\n", __func__, usecs);
if (!sp_check_commandavail(S_CMD_O_DELAY)) {
msg_pdbg2("serprog_delay used, but programmer doesn't support delays natively - emulating\n");
- internal_delay(usecs);
+ default_delay(usecs);
return;
}
if ((sp_max_write_n) && (sp_write_n_bytes))
diff --git a/udelay.c b/udelay.c
index 6c0efc4..82ddcbd 100644
--- a/udelay.c
+++ b/udelay.c
@@ -235,7 +235,7 @@
}
/* Precise delay. */
-void internal_delay(unsigned int usecs)
+void default_delay(unsigned int usecs)
{
/* If the delay is >1 s, use internal_sleep because timing does not need to be so precise. */
if (usecs > 1000000) {
@@ -255,7 +255,7 @@
get_cpu_speed();
}
-void internal_delay(unsigned int usecs)
+void default_delay(unsigned int usecs)
{
udelay(usecs);
}
diff --git a/wbsio_spi.c b/wbsio_spi.c
index b643eb4..d635a09 100644
--- a/wbsio_spi.c
+++ b/wbsio_spi.c
@@ -155,7 +155,7 @@
OUTB(writearr[0], data->spibase);
OUTB(mode, data->spibase + 1);
- internal_delay(10);
+ default_delay(10);
if (!readcnt)
return 0;
To view, visit change 68855. To unsubscribe, or for help writing mail filters, visit settings.