Attention is currently required from: Nico Huber, Thomas Heijligen.
Angel Pons would like Nico Huber and Thomas Heijligen to review this change.
flashchips.c: Drop incorrect `FEATURE_4BA_ENTER_EAR7` uses
Using `FEATURE_4BA_ENTER_EAR7` along with `FEATURE_4BA` does not make
sense, as `FEATURE_4BA` implies `FEATURE_4BA_ENTER` and the `spi25.c`
function `spi_enter_exit_4ba()` only handles `FEATURE_4BA_ENTER_EAR7`
if `FEATURE_4BA_ENTER` is not set.
Besides, the datasheet for the two affected chips says the following:
Note: The EN4B instruction will set the Bit 7 (EXTADD) of the
volatile Bank Address Register to "1", but will not change
the non-volatile Bank Address Register.
This means the chip itself will set the bit that flashrom would set to
enable 4BA mode when `FEATURE_4BA_ENTER_EAR7` is effective. This seems
to be some sort of backwards compatibility behavior with software that
uses the EXTADD bit to know whether the flash chip is in 4BA mode.
Change-Id: I5510bab25dbb04c12ef8d6bd3fcb6faa51d6a1e8
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
---
M flashchips.c
1 file changed, 2 insertions(+), 2 deletions(-)
git pull ssh://review.coreboot.org:29418/flashrom refs/changes/24/64424/1
diff --git a/flashchips.c b/flashchips.c
index d155b24..dfa717b 100644
--- a/flashchips.c
+++ b/flashchips.c
@@ -7470,7 +7470,7 @@
/* supports SFDP */
/* OTP: 1024B total; read 0x68; write 0x62, erase 0x64, read ID 0x4B */
/* FOUR_BYTE_ADDR: supports 4-bytes addressing mode */
- .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP | FEATURE_4BA | FEATURE_4BA_ENTER_EAR7,
+ .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP | FEATURE_4BA,
.tested = TEST_OK_PREW,
.probe = probe_spi_rdid,
.probe_timing = TIMING_ZERO,
@@ -7646,7 +7646,7 @@
/* supports SFDP */
/* OTP: 1024B total; read 0x68; write 0x62, erase 0x64, read ID 0x4B */
/* FOUR_BYTE_ADDR: supports 4-bytes addressing mode */
- .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP | FEATURE_4BA | FEATURE_4BA_ENTER_EAR7,
+ .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP | FEATURE_4BA,
.tested = TEST_OK_PREW,
.probe = probe_spi_rdid,
.probe_timing = TIMING_ZERO,
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