Patrick Rudolph would like Patrick Rudolph to review this change.

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flashchips: Fix W25Q256.W

Used the datasheet from here:
https://www.winbond.com/resource-files/w25q256jw%20spi%20revb%2012082017.pdf

The chips supports all native 4BA instructions.

Change-Id: I9a3995c66ad7b74823e17984bf1ffac50b5663e0
Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
---
M flashchips.c
1 file changed, 8 insertions(+), 2 deletions(-)

git pull ssh://review.coreboot.org:29418/flashrom refs/changes/10/44810/1

diff --git a/flashchips.c b/flashchips.c
index 8b5b5cc..2c16f89 100644
--- a/flashchips.c
+++ b/flashchips.c
@@ -16854,8 +16854,8 @@
 		.page_size	= 256,
 		/* supports SFDP */
 		/* OTP: 1024B total, 256B reserved; read 0x48; write 0x42, erase 0x44, read ID 0x4B */
-		.feature_bits	= FEATURE_WRSR_WREN | FEATURE_OTP | FEATURE_4BA_ENTER_WREN
-			| FEATURE_4BA_EXT_ADDR | FEATURE_4BA_READ | FEATURE_4BA_FAST_READ,
+		/* FOUR_BYTE_ADDR: supports 4-bytes addressing mode */
+		.feature_bits	= FEATURE_WRSR_WREN | FEATURE_OTP | FEATURE_4BA,
 		.tested		= TEST_OK_PREW,
 		.probe		= probe_spi_rdid,
 		.probe_timing	= TIMING_ZERO,
@@ -16863,12 +16863,18 @@
 		{
 			{
 				.eraseblocks = { {4 * 1024, 8192} },
+				.block_erase = spi_block_erase_21,
+			}, {
+				.eraseblocks = { {4 * 1024, 8192} },
 				.block_erase = spi_block_erase_20,
 			}, {
 				.eraseblocks = { {32 * 1024, 1024} },
 				.block_erase = spi_block_erase_52,
 			}, {
 				.eraseblocks = { {64 * 1024, 512} },
+				.block_erase = spi_block_erase_dc,
+			}, {
+				.eraseblocks = { {64 * 1024, 512} },
 				.block_erase = spi_block_erase_d8,
 			}, {
 				.eraseblocks = { {32 * 1024 * 1024, 1} },

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