Attention is currently required from: Felix Singer, Nico Huber, Michał Żygowski, Paul Menzel, Sergii Dmytruk.

5 comments:

File ite_ecfw.c:
- Patch Set #20, Line 87: enables
  disables
- Patch Set #20, Line 87: crc_check
  this bit is inverted (1 = disable); change the name to `no_crc_check`?
  see https://review.coreboot.org/c/flashrom/+/55715/comment/a9260ea9_773456f9/
- Patch Set #20, Line 91: fspi_mirror
  this bit is negated (1 = disable), change the name to `no_fspi_mirror`?
  see https://review.coreboot.org/c/flashrom/+/55715/comment/a9260ea9_773456f9/
- Patch Set #20, Line 93: pwm_blinking
  this bit is negated (1 = disable); change the name to `no_pwm_blinking`?
  see https://review.coreboot.org/c/flashrom/+/55715/comment/a9260ea9_773456f9/
- Patch Set #20, Line 332:
```
		if (blocks_1_2) {
			itestring->flags.clock_source = CLOCK_SOURCE_INTERNAL;
```
  hm, I know the reference implementation does that... but does it make sense at all to make the clock source dependent on the block count? I somehow have the feeling the reference implementation misuses the block count to differentiate EC with and without crystal-free (internal) support :S

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