Angel Pons has uploaded this change for review.

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nicintel_spi.c: Cache FLA register value

Only read the FLA register to get the state of MISO, and when requesting
and releasing the bus. This is an optimisation to speed things up.

Tested on a 8086:1533 (i210 GbE), reads still return the same data.
This cuts the time to read a Winbond W25Q80.V (1 MiB, SPI) from 48
seconds down to 33 seconds, i.e. a 45% increase in speed.

Change-Id: I4013a71ec498be977f62fe2531ac8770bfffadcd
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
---
M nicintel_spi.c
1 file changed, 30 insertions(+), 40 deletions(-)

git pull ssh://review.coreboot.org:29418/flashrom refs/changes/20/55720/1

diff --git a/nicintel_spi.c b/nicintel_spi.c
index 5dcdf7d..2bcaf24 100644
--- a/nicintel_spi.c
+++ b/nicintel_spi.c
@@ -77,6 +77,7 @@
 
 struct nicintel_spi_data {
 	uint8_t *spibar;
+	uint32_t fla;
 };
 
 static const struct dev_entry nics_intel_spi[] = {
@@ -112,11 +113,10 @@
 static void nicintel_request_spibus(void *spi_data)
 {
 	struct nicintel_spi_data *data = spi_data;
-	uint32_t tmp;
 
-	tmp = pci_mmio_readl(data->spibar + FLA);
-	tmp |= BIT(FL_REQ);
-	pci_mmio_writel(tmp, data->spibar + FLA);
+	data->fla = pci_mmio_readl(data->spibar + FLA);
+	data->fla |= BIT(FL_REQ);
+	pci_mmio_writel(data->fla, data->spibar + FLA);
 
 	/* Wait until we are allowed to use the SPI bus. */
 	while (!(pci_mmio_readl(data->spibar + FLA) & BIT(FL_GNT))) ;
@@ -125,79 +125,69 @@
 static void nicintel_release_spibus(void *spi_data)
 {
 	struct nicintel_spi_data *data = spi_data;
-	uint32_t tmp;
 
-	tmp = pci_mmio_readl(data->spibar + FLA);
-	tmp &= ~BIT(FL_REQ);
-	pci_mmio_writel(tmp, data->spibar + FLA);
+	data->fla = pci_mmio_readl(data->spibar + FLA);
+	data->fla &= ~BIT(FL_REQ);
+	pci_mmio_writel(data->fla, data->spibar + FLA);
 }
 
 static void nicintel_bitbang_set_cs(int val, void *spi_data)
 {
 	struct nicintel_spi_data *data = spi_data;
-	uint32_t tmp;
 
-	tmp = pci_mmio_readl(data->spibar + FLA);
-	tmp &= ~BIT(FL_CS);
-	tmp |= (val << FL_CS);
-	pci_mmio_writel(tmp, data->spibar + FLA);
+	data->fla &= ~BIT(FL_CS);
+	data->fla |= (val << FL_CS);
+	pci_mmio_writel(data->fla, data->spibar + FLA);
 }
 
 static void nicintel_bitbang_set_sck(int val, void *spi_data)
 {
 	struct nicintel_spi_data *data = spi_data;
-	uint32_t tmp;
 
-	tmp = pci_mmio_readl(data->spibar + FLA);
-	tmp &= ~BIT(FL_SCK);
-	tmp |= (val << FL_SCK);
-	pci_mmio_writel(tmp, data->spibar + FLA);
+	data->fla &= ~BIT(FL_SCK);
+	data->fla |= (val << FL_SCK);
+	pci_mmio_writel(data->fla, data->spibar + FLA);
 }
 
 static void nicintel_bitbang_set_mosi(int val, void *spi_data)
 {
 	struct nicintel_spi_data *data = spi_data;
-	uint32_t tmp;
 
-	tmp = pci_mmio_readl(data->spibar + FLA);
-	tmp &= ~BIT(FL_SI);
-	tmp |= (val << FL_SI);
-	pci_mmio_writel(tmp, data->spibar + FLA);
+	data->fla &= ~BIT(FL_SI);
+	data->fla |= (val << FL_SI);
+	pci_mmio_writel(data->fla, data->spibar + FLA);
 }
 
 static void nicintel_bitbang_set_sck_set_mosi(int sck, int mosi, void *spi_data)
 {
 	struct nicintel_spi_data *data = spi_data;
-	uint32_t tmp;
 
-	tmp = pci_mmio_readl(data->spibar + FLA);
-	tmp &= ~BIT(FL_SCK);
-	tmp &= ~BIT(FL_SI);
-	tmp |= (sck << FL_SCK);
-	tmp |= (mosi << FL_SI);
-	pci_mmio_writel(tmp, data->spibar + FLA);
+	data->fla &= ~BIT(FL_SCK);
+	data->fla &= ~BIT(FL_SI);
+	data->fla |= (sck << FL_SCK);
+	data->fla |= (mosi << FL_SI);
+	pci_mmio_writel(data->fla, data->spibar + FLA);
 }
 
 static int nicintel_bitbang_get_miso(void *spi_data)
 {
 	struct nicintel_spi_data *data = spi_data;
-	uint32_t tmp;
 
-	tmp = pci_mmio_readl(data->spibar + FLA);
-	tmp = (tmp >> FL_SO) & 0x1;
-	return tmp;
+	data->fla = pci_mmio_readl(data->spibar + FLA);
+
+	return (data->fla >> FL_SO) & 0x1;
 }
 
 static int nicintel_bitbang_set_sck_get_miso(int sck, void *spi_data)
 {
 	struct nicintel_spi_data *data = spi_data;
-	uint32_t tmp;
 
-	tmp = pci_mmio_readl(data->spibar + FLA);
-	tmp &= ~BIT(FL_SCK);
-	tmp |= (sck << FL_SCK);
-	pci_mmio_writel(tmp, data->spibar + FLA);
-	return (tmp >> FL_SO) & 0x1;
+	data->fla = pci_mmio_readl(data->spibar + FLA);
+	data->fla &= ~BIT(FL_SCK);
+	data->fla |= (sck << FL_SCK);
+	pci_mmio_writel(data->fla, data->spibar + FLA);
+
+	return (data->fla >> FL_SO) & 0x1;
 }
 
 static const struct bitbang_spi_master bitbang_spi_master_nicintel = {

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