Felix Singer has uploaded this change for review.
ichspi.c: Rename some variables
WIP.
Signed-off-by: Felix Singer <felixsinger@posteo.net>
Change-Id: Icb724a58dd4a1375a2c0a660484cb646f162f5be
---
M ichspi.c
1 file changed, 28 insertions(+), 16 deletions(-)
git pull ssh://review.coreboot.org:29418/flashrom refs/changes/31/67431/1
diff --git a/ichspi.c b/ichspi.c
index f5876b7..7ab7434 100644
--- a/ichspi.c
+++ b/ichspi.c
@@ -256,7 +256,7 @@
};
/* ICH SPI configuration lock-down. May be set during chipset enabling. */
-static bool ichspi_lock = false;
+static bool is_ichspi_locked = false;
static enum ich_chipset ich_generation = CHIPSET_ICH_UNKNOWN;
static uint32_t ichspi_bbar;
@@ -860,7 +860,7 @@
static int ich7_run_opcode(OPCODE op, uint32_t offset,
uint8_t datalength, uint8_t * data, int maxdata)
{
- bool write_cmd = false;
+ bool is_write_cmd = false;
int timeout;
uint32_t temp32;
uint16_t temp16;
@@ -870,7 +870,7 @@
/* Is it a write command? */
if ((op.spi_type == SPI_OPCODE_TYPE_WRITE_NO_ADDRESS)
|| (op.spi_type == SPI_OPCODE_TYPE_WRITE_WITH_ADDRESS)) {
- write_cmd = true;
+ is_write_cmd = true;
}
timeout = 100 * 60; /* 60 ms are 9.6 million cycles at 16 MHz. */
@@ -887,7 +887,7 @@
REGWRITE32(ICH7_REG_SPIA, (offset & 0x00FFFFFF) | temp32);
/* Program data into SPID0 to N */
- if (write_cmd && (datalength != 0))
+ if (is_write_cmd && (datalength != 0))
ich_fill_data(data, datalength, ICH7_REG_SPID0);
/* Assemble SPIS */
@@ -968,7 +968,7 @@
return 1;
}
- if ((!write_cmd) && (datalength != 0))
+ if ((!is_write_cmd) && (datalength != 0))
ich_read_data(data, datalength, ICH7_REG_SPID0);
return 0;
@@ -977,7 +977,7 @@
static int ich9_run_opcode(OPCODE op, uint32_t offset,
uint8_t datalength, uint8_t * data)
{
- bool write_cmd = false;
+ bool is_write_cmd = false;
int timeout;
uint32_t temp32;
uint64_t opmenu;
@@ -986,7 +986,7 @@
/* Is it a write command? */
if ((op.spi_type == SPI_OPCODE_TYPE_WRITE_NO_ADDRESS)
|| (op.spi_type == SPI_OPCODE_TYPE_WRITE_WITH_ADDRESS)) {
- write_cmd = true;
+ is_write_cmd = true;
}
timeout = 100 * 60; /* 60 ms are 9.6 million cycles at 16 MHz. */
@@ -1004,7 +1004,7 @@
REGWRITE32(ICH9_REG_FADDR, (offset & 0x00FFFFFF) | temp32);
/* Program data into FDATA0 to N */
- if (write_cmd && (datalength != 0))
+ if (is_write_cmd && (datalength != 0))
ich_fill_data(data, datalength, ICH9_REG_FDATA0);
/* Assemble SSFS + SSFC */
@@ -1091,7 +1091,7 @@
return 1;
}
- if ((!write_cmd) && (datalength != 0))
+ if ((!is_write_cmd) && (datalength != 0))
ich_read_data(data, datalength, ICH9_REG_FDATA0);
return 0;
@@ -1142,7 +1142,7 @@
/* find cmd in opcodes-table */
opcode_index = find_opcode(curopcodes, cmd);
if (opcode_index == -1) {
- if (!ichspi_lock)
+ if (!is_ichspi_locked)
opcode_index = reprogram_opcode_on_the_fly(cmd, writecnt, readcnt);
if (opcode_index == SPI_INVALID_LENGTH) {
msg_pdbg("OPCODE 0x%02x has unsupported length, will not execute.\n", cmd);
@@ -1655,7 +1655,7 @@
* during execution of the next command anyway.
* No need to bother with fixups.
*/
- if (!ichspi_lock) {
+ if (!is_ichspi_locked) {
oppos = reprogram_opcode_on_the_fly((cmds + 1)->writearr[0], (cmds + 1)->writecnt, (cmds + 1)->readcnt);
if (oppos == -1)
continue;
@@ -1858,7 +1858,7 @@
}
if (mmio_readw(spibar) & (1 << 15)) {
msg_pwarn("WARNING: SPI Configuration Lockdown activated.\n");
- ichspi_lock = true;
+ is_ichspi_locked = true;
}
ich_init_opcodes(ich_gen);
ich_set_bbar(0, ich_gen);
@@ -1987,7 +1987,7 @@
prettyprint_ich9_reg_hsfs(tmp2, ich_gen);
if (tmp2 & HSFS_FLOCKDN) {
msg_pinfo("SPI Configuration is locked down.\n");
- ichspi_lock = true;
+ is_ichspi_locked = true;
}
if (tmp2 & HSFS_FDV)
desc_valid = true;
@@ -2046,7 +2046,7 @@
/* Handle PR registers */
for (i = 0; i < num_pr; i++) {
/* if not locked down try to disable PR locks first */
- if (!ichspi_lock)
+ if (!is_ichspi_locked)
ich9_set_pr(reg_pr0, i, 0, 0);
ich_spi_rw_restricted |= ich9_handle_pr(reg_pr0, i);
}
@@ -2157,7 +2157,7 @@
}
}
- if (ich_spi_mode == ich_auto && ichspi_lock &&
+ if (ich_spi_mode == ich_auto && is_ichspi_locked &&
ich_missing_opcodes()) {
msg_pinfo("Enabling hardware sequencing because "
"some important opcode is locked.\n");
@@ -2279,7 +2279,7 @@
msg_pdbg("0x6c: 0x%04x (CLOCK/DEBUG)\n", mmio_readw(ich_spibar + 0x6c));
if (mmio_readw(ich_spibar) & (1 << 15)) {
msg_pwarn("Warning: SPI Configuration Lockdown activated.\n");
- ichspi_lock = true;
+ is_ichspi_locked = true;
}
ich_set_bbar(0, ich_generation);
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