Edward O'Callaghan has uploaded this change for review.

View Change

internal.c: De-maze the pre-processor wraps a little

This makes it again easier to parse internal.c by consolidating
some processor wraps and labeling the ends of others.

BUG=none
BRANCH=none
TEST=builds

Change-Id: I32fb1a3fff7afa671f08fb2cc2ad406772f5e10f
Signed-off-by: Edward O'Callaghan <quasisec@google.com>
---
M internal.c
1 file changed, 3 insertions(+), 5 deletions(-)

git pull ssh://review.coreboot.org:29418/flashrom refs/changes/15/46815/1
diff --git a/internal.c b/internal.c
index 5d74f92..4390b45 100644
--- a/internal.c
+++ b/internal.c
@@ -113,7 +113,7 @@
return 0;
}

-#endif
+#endif /* IS_X86 */

static void internal_chip_writeb(const struct flashctx *flash, uint8_t val,
chipaddr addr)
@@ -281,9 +281,7 @@
msg_pinfo("Continuing anyway.\n");
}
}
-#endif

-#if IS_X86
is_laptop = 2; /* Assume that we don't know by default. */

dmi_init();
@@ -299,7 +297,7 @@
* FIXME: Find a replacement for DMI on non-x86.
* FIXME: Enable Super I/O probing once port I/O is possible.
*/
-#endif
+#endif /* IS_X86 */

/* Check laptop whitelist. */
board_handle_before_laptop();
@@ -333,7 +331,7 @@
ret = 1;
goto internal_init_exit;
}
-#endif
+#endif /* IS_X86 */

if (internal_buses_supported & BUS_NONSPI)
register_par_master(&par_master_internal, internal_buses_supported);

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Gerrit-Project: flashrom
Gerrit-Branch: master
Gerrit-Change-Id: I32fb1a3fff7afa671f08fb2cc2ad406772f5e10f
Gerrit-Change-Number: 46815
Gerrit-PatchSet: 1
Gerrit-Owner: Edward O'Callaghan <quasisec@chromium.org>
Gerrit-MessageType: newchange