Edward O'Callaghan uploaded patch set #3 to this change.

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chipset_enable.c: Add Intel pch6 did=0x1e4{1,2,3} support

Modified to be pch7 over pch6 as per-coreboot and review
comments.

BUG=none
BRANCH=none
TEST=none

Change-Id: Ic69dc024e9af0c43d6b3a8213a5dc5d2f898c447
Signed-off-by: Edward O'Callaghan <quasisec@google.com>
---
M chipset_enable.c
1 file changed, 3 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/flashrom refs/changes/90/47090/3

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