Before I continue the review: Is this really the version you tested?
You said something about a copy of AT25DF041A on IRC, but this looks
like a copy of AT26DF041 which doesn't seem to make much sense.

View Change

3 comments:

• Commit Message:

  • Patch Set #4, Line 9:

    Reasonably certain this is working due to erase/read/write hardware-tests in a setup in which the flash content contained a running FPGA program. Meaningful content was stored on the chip beforehand. I read a.rom, erased, observed the FPGA dead, read b.rom, wrote back a.rom, observed the FPGA alive again. I verified b.rom in a hex editor contained 0xff only.
    The FPGA data used only a small portion of the address space, so I also wrote out a file with specific 3 bytes in the first and last memory page. All flashrom verify cycles passed.
    

    Line length limit is 72 chars. I also don't see a reason for the
    whole story. Just stating that probe/read/erase/write was tested
    should be enough.

• File flashchips.c:

  • Patch Set #4, Line 2194: .block_erase = spi_block_erase_81,

    Can't find anything about it in the datasheet.

  • Patch Set #4, Line 2197: .block_erase = spi_block_erase_50,

    0x50 is EWSR (enable write status register)

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