7 is the latest approved patch-set.
No files were changed between the latest approved patch-set and the submitted one.


writeprotect: Add function to get register values and WP bit masks

Add a new wp_cfg_to_reg_values() function that takes a generic wp_cfg
instance and returns the chip-specific values that need to be written to
the chip's registers to enable the specified protection range/mode.

The function returns three values for each chip register:
- reg_values[reg]  - Value writeprotect will write to reg
- bit_masks[reg]   - Bit mask for WP-related bits in reg
- write_masks[reg] - Bit mask for writable WP-related bits in reg
                     (i.e. the ones writeprotect will try to write)

BUG=b:260019525,b:259013033,260020006
BRANCH=none
TEST=ninja test

Change-Id: Ib2a47153b230c9f82bb4eca357c335f2abbacc20
Signed-off-by: Nikolai Artemiev <nartemiev@google.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/69847
Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Sergii Dmytruk <sergii.dmytruk@3mdeb.com>
---
M include/writeprotect.h
M tests/chip_wp.c
M tests/tests.c
M tests/tests.h
M writeprotect.c
5 files changed, 129 insertions(+), 0 deletions(-)

diff --git a/include/writeprotect.h b/include/writeprotect.h
index 12926c4..7ceed07 100644
--- a/include/writeprotect.h
+++ b/include/writeprotect.h
@@ -89,4 +89,10 @@
 /* Checks if writeprotect functions can be used with the current flash/programmer */
 bool wp_operations_available(struct flashrom_flashctx *);
 
+/*
+ * Converts a writeprotect config to register values and masks that indicate which register bits affect WP state.
+ * reg_values, bit_masks, and write_masks must all have length of at least MAX_REGISTERS.
+ */
+enum flashrom_wp_result wp_cfg_to_reg_values(uint8_t *reg_values, uint8_t *bit_masks, uint8_t *write_masks, struct flashrom_flashctx *, const struct flashrom_wp_cfg *);
+
 #endif /* !__WRITEPROTECT_H__ */
diff --git a/tests/chip_wp.c b/tests/chip_wp.c
index cb9b3ab..9607a96 100644
--- a/tests/chip_wp.c
+++ b/tests/chip_wp.c
@@ -327,3 +327,68 @@
 
 	flashrom_wp_cfg_release(wp_cfg);
 }
+
+/* Chip register values & masks are calculated correctly by WP */
+void wp_get_register_values_and_masks(void **state)
+{
+	(void) state; /* unused */
+
+	/*
+	 * Test with range: start = 0x004000, lengh = 0xffc000
+	 *
+	 * WP should use these bit values:
+	 * WPS  (S17) = 0 (write protect scheme)
+	 * CMP  (S14) = 1 (range complement)
+	 * SRP1 (S8)  = 0
+	 * SRP0 (S7)  = 1 (`SRP1 == 1 && SRP0 == 1` is permanent mode)
+	 * SEC  (S6)  = 1 (base unit is a 4 KiB sector)
+	 * TB   (S5)  = 1 (bottom up range)
+	 * BP2  (S4)  = 0
+	 * BP1  (S3)  = 1
+	 * BP0  (S2)  = 1 (bp: BP2-0 == 0b011 == 3)
+	 *
+	 * Register values:
+	 * SR1 = 0b11101100 = 0xec
+	 * SR2 = 0b01000000 = 0x40
+	 * SR3 = 0b00000000 = 0x00
+	 *
+	 * Masks for WP bits in registers:
+	 * SR1: 0b11111100 = 0xfc
+	 * SR2: 0b01000000 = 0x41
+	 * SR3: 0b00000100 = 0x04
+	 *
+	 * All WP bits are RW so write masks should be the same as the bit masks.
+	 *
+	 */
+	struct flashrom_flashctx flash = { 0 };
+	struct flashchip mock_chip = chip_W25Q128_V;
+	struct flashrom_wp_cfg *wp_cfg;
+
+	uint8_t reg_values[MAX_REGISTERS];
+	uint8_t bit_masks[MAX_REGISTERS];
+	uint8_t write_masks[MAX_REGISTERS];
+
+	setup_chip(&flash, NULL, &mock_chip, "bus=spi,emulate=W25Q128FV");
+
+	assert_int_equal(0, flashrom_wp_cfg_new(&wp_cfg));
+	flashrom_wp_set_mode(wp_cfg, FLASHROM_WP_MODE_HARDWARE);
+	flashrom_wp_set_range(wp_cfg, 0x004000, 0xffc000);
+
+	assert_int_equal(0, wp_cfg_to_reg_values(reg_values, bit_masks, write_masks, &flash, wp_cfg));
+
+	assert_int_equal(0xec, reg_values[STATUS1]);
+	assert_int_equal(0x40, reg_values[STATUS2]);
+	assert_int_equal(0x00, reg_values[STATUS3]);
+
+	assert_int_equal(0xfc, bit_masks[STATUS1]);
+	assert_int_equal(0x41, bit_masks[STATUS2]);
+	assert_int_equal(0x04, bit_masks[STATUS3]);
+
+	assert_int_equal(0xfc, write_masks[STATUS1]);
+	assert_int_equal(0x41, write_masks[STATUS2]);
+	assert_int_equal(0x04, write_masks[STATUS3]);
+
+	teardown(NULL);
+
+	flashrom_wp_cfg_release(wp_cfg);
+}
diff --git a/tests/tests.c b/tests/tests.c
index 0de0168..911cf47 100644
--- a/tests/tests.c
+++ b/tests/tests.c
@@ -494,6 +494,7 @@
 		cmocka_unit_test(wp_init_from_status_dummyflasher_test_success),
 		cmocka_unit_test(full_chip_erase_with_wp_dummyflasher_test_success),
 		cmocka_unit_test(partial_chip_erase_with_wp_dummyflasher_test_success),
+		cmocka_unit_test(wp_get_register_values_and_masks),
 	};
 	ret |= cmocka_run_group_tests_name("chip_wp.c tests", chip_wp_tests, NULL, NULL);
 
diff --git a/tests/tests.h b/tests/tests.h
index 8f63f91..e273e1d 100644
--- a/tests/tests.h
+++ b/tests/tests.h
@@ -92,6 +92,7 @@
 void wp_init_from_status_dummyflasher_test_success(void **state);
 void full_chip_erase_with_wp_dummyflasher_test_success(void **state);
 void partial_chip_erase_with_wp_dummyflasher_test_success(void **state);
+void wp_get_register_values_and_masks(void **state);
 
 /* selfcheck.c */
 void selfcheck_programmer_table(void **state);
diff --git a/writeprotect.c b/writeprotect.c
index d8ffa68..411089d 100644
--- a/writeprotect.c
+++ b/writeprotect.c
@@ -597,3 +597,31 @@
 	free(range_pairs);
 	return ret;
 }
+
+enum flashrom_wp_result wp_cfg_to_reg_values(
+		uint8_t *reg_values, uint8_t *bit_masks, uint8_t *write_masks,
+		struct flashctx *flash, const struct flashrom_wp_cfg *cfg)
+{
+	struct wp_bits bits;
+
+	if (!chip_supported(flash))
+		return FLASHROM_WP_ERR_CHIP_UNSUPPORTED;
+
+	enum flashrom_wp_result ret = read_wp_bits(&bits, flash);
+	if (ret != FLASHROM_WP_OK)
+		return ret;
+
+	/* Set protection range */
+	ret = set_wp_range(&bits, flash, cfg->range);
+	if (ret != FLASHROM_WP_OK)
+		return ret;
+
+	/* Set protection mode */
+	ret = set_wp_mode(&bits, cfg->mode);
+	if (ret != FLASHROM_WP_OK)
+		return ret;
+
+	get_wp_bits_reg_values(reg_values, bit_masks, write_masks, &flash->chip->reg_bits, bits);
+
+	return FLASHROM_WP_OK;
+}

