Aarya uploaded patch set #2 to the change originally created by Thomas Heijligen.

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spi.c: Add AT45 & SF25F erasefn opcode mapping

Change-Id: I798a91f1e20b63662715c68e6d43d03fc6005d51
Signed-off-by: Thomas Heijligen <thomas.heijligen@secunet.com>
---
M include/chipdrivers.h
M spi.c
2 files changed, 57 insertions(+), 19 deletions(-)

git pull ssh://review.coreboot.org:29418/flashrom refs/changes/17/67717/2

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