Thomas Heijligen has uploaded this change for review.
programmer.h: regroup parts for the internal programmer
Change-Id: I0dcdb6c7998eec36e619f6e5c82825f60a2435ac
Signed-off-by: Thomas Heijligen <thomas.heijligen@secunet.com>
---
M programmer.h
1 file changed, 74 insertions(+), 83 deletions(-)
git pull ssh://review.coreboot.org:29418/flashrom refs/changes/68/63468/1
diff --git a/programmer.h b/programmer.h
index 8abd7d6..bf67a1c 100644
--- a/programmer.h
+++ b/programmer.h
@@ -141,6 +141,39 @@
int rpci_write_word(struct pci_dev *dev, int reg, uint16_t data);
int rpci_write_long(struct pci_dev *dev, int reg, uint32_t data);
+/* The following enum is needed by ich_descriptor_tool and ich* code as well as in chipset_enable.c. */
+enum ich_chipset {
+ CHIPSET_ICH_UNKNOWN,
+ CHIPSET_ICH,
+ CHIPSET_ICH2345,
+ CHIPSET_ICH6,
+ CHIPSET_POULSBO, /* SCH U* */
+ CHIPSET_TUNNEL_CREEK, /* Atom E6xx */
+ CHIPSET_CENTERTON, /* Atom S1220 S1240 S1260 */
+ CHIPSET_ICH7,
+ CHIPSET_ICH8,
+ CHIPSET_ICH9,
+ CHIPSET_ICH10,
+ CHIPSET_5_SERIES_IBEX_PEAK,
+ CHIPSET_6_SERIES_COUGAR_POINT,
+ CHIPSET_7_SERIES_PANTHER_POINT,
+ CHIPSET_8_SERIES_LYNX_POINT,
+ CHIPSET_BAYTRAIL, /* Actually all with Silvermont architecture: Bay Trail, Avoton/Rangeley */
+ CHIPSET_8_SERIES_LYNX_POINT_LP,
+ CHIPSET_8_SERIES_WELLSBURG,
+ CHIPSET_9_SERIES_WILDCAT_POINT,
+ CHIPSET_9_SERIES_WILDCAT_POINT_LP,
+ CHIPSET_100_SERIES_SUNRISE_POINT, /* also 6th/7th gen Core i/o (LP) variants */
+ CHIPSET_C620_SERIES_LEWISBURG,
+ CHIPSET_300_SERIES_CANNON_POINT,
+ CHIPSET_400_SERIES_COMET_POINT,
+ CHIPSET_500_SERIES_TIGER_POINT,
+ CHIPSET_600_SERIES_ALDER_POINT,
+ CHIPSET_METEOR_LAKE,
+ CHIPSET_APOLLO_LAKE,
+ CHIPSET_GEMINI_LAKE,
+ CHIPSET_ELKHART_LAKE,
+};
#if CONFIG_INTERNAL == 1
struct penable {
@@ -207,15 +240,6 @@
extern const struct board_info boards_known[];
extern const struct board_info laptops_known[];
-#endif
-
-/* udelay.c */
-void myusec_delay(unsigned int usecs);
-void myusec_calibrate_delay(void);
-void internal_sleep(unsigned int usecs);
-void internal_delay(unsigned int usecs);
-
-#if CONFIG_INTERNAL == 1
/* board_enable.c */
int selfcheck_board_enables(void);
int board_parse_parameter(const char *boardstring, char **vendor, char **model);
@@ -235,9 +259,7 @@
/* processor_enable.c */
int processor_flash_enable(void);
-#endif
-#if CONFIG_INTERNAL == 1
/* cbtable.c */
int cb_parse_table(const char **vendor, const char **model);
int cb_check_image(const uint8_t *bios, unsigned int size);
@@ -260,8 +282,7 @@
#define SUPERIO_VENDOR_NONE 0x0
#define SUPERIO_VENDOR_ITE 0x1
#define SUPERIO_VENDOR_WINBOND 0x2
-#endif
-#if CONFIG_INTERNAL == 1
+
extern int is_laptop;
extern int laptop_ok;
extern int force_boardenable;
@@ -269,8 +290,48 @@
void probe_superio(void);
int register_superio(struct superio s);
extern enum chipbustype internal_buses_supported;
+
+/* ichspi.c */
+int ich_init_spi(void *spibar, enum ich_chipset ich_generation);
+int via_init_spi(uint32_t mmio_base);
+
+/* amd_imc.c */
+int amd_imc_shutdown(struct pci_dev *dev);
+
+/* it85spi.c */
+int it85xx_spi_init(struct superio s);
+
+/* it87spi.c */
+void enter_conf_mode_ite(uint16_t port);
+void exit_conf_mode_ite(uint16_t port);
+void probe_superio_ite(void);
+int init_superio_ite(void);
+
+#if CONFIG_LINUX_MTD == 1
+/* trivial wrapper to avoid cluttering internal_init() with #if */
+static inline int try_mtd(void) { return programmer_linux_mtd.init(); };
+#else
+static inline int try_mtd(void) { return 1; };
#endif
+/* mcp6x_spi.c */
+int mcp6x_spi_init(int want_spi);
+
+
+
+/* sb600spi.c */
+int sb600_probe_spi(struct pci_dev *dev);
+
+/* wbsio_spi.c */
+int wbsio_check_for_spi(void);
+#endif
+
+/* udelay.c */
+void myusec_delay(unsigned int usecs);
+void myusec_calibrate_delay(void);
+void internal_sleep(unsigned int usecs);
+void internal_delay(unsigned int usecs);
+
/* bitbang_spi.c */
int register_spi_bitbang_master(const struct bitbang_spi_master *master, void *spi_data);
@@ -322,76 +383,6 @@
int default_spi_write_aai(struct flashctx *flash, const uint8_t *buf, unsigned int start, unsigned int len);
int register_spi_master(const struct spi_master *mst, void *data);
-/* The following enum is needed by ich_descriptor_tool and ich* code as well as in chipset_enable.c. */
-enum ich_chipset {
- CHIPSET_ICH_UNKNOWN,
- CHIPSET_ICH,
- CHIPSET_ICH2345,
- CHIPSET_ICH6,
- CHIPSET_POULSBO, /* SCH U* */
- CHIPSET_TUNNEL_CREEK, /* Atom E6xx */
- CHIPSET_CENTERTON, /* Atom S1220 S1240 S1260 */
- CHIPSET_ICH7,
- CHIPSET_ICH8,
- CHIPSET_ICH9,
- CHIPSET_ICH10,
- CHIPSET_5_SERIES_IBEX_PEAK,
- CHIPSET_6_SERIES_COUGAR_POINT,
- CHIPSET_7_SERIES_PANTHER_POINT,
- CHIPSET_8_SERIES_LYNX_POINT,
- CHIPSET_BAYTRAIL, /* Actually all with Silvermont architecture: Bay Trail, Avoton/Rangeley */
- CHIPSET_8_SERIES_LYNX_POINT_LP,
- CHIPSET_8_SERIES_WELLSBURG,
- CHIPSET_9_SERIES_WILDCAT_POINT,
- CHIPSET_9_SERIES_WILDCAT_POINT_LP,
- CHIPSET_100_SERIES_SUNRISE_POINT, /* also 6th/7th gen Core i/o (LP) variants */
- CHIPSET_C620_SERIES_LEWISBURG,
- CHIPSET_300_SERIES_CANNON_POINT,
- CHIPSET_400_SERIES_COMET_POINT,
- CHIPSET_500_SERIES_TIGER_POINT,
- CHIPSET_600_SERIES_ALDER_POINT,
- CHIPSET_METEOR_LAKE,
- CHIPSET_APOLLO_LAKE,
- CHIPSET_GEMINI_LAKE,
- CHIPSET_ELKHART_LAKE,
-};
-
-/* ichspi.c */
-#if CONFIG_INTERNAL == 1
-int ich_init_spi(void *spibar, enum ich_chipset ich_generation);
-int via_init_spi(uint32_t mmio_base);
-
-/* amd_imc.c */
-int amd_imc_shutdown(struct pci_dev *dev);
-
-/* it85spi.c */
-int it85xx_spi_init(struct superio s);
-
-/* it87spi.c */
-void enter_conf_mode_ite(uint16_t port);
-void exit_conf_mode_ite(uint16_t port);
-void probe_superio_ite(void);
-int init_superio_ite(void);
-
-#if CONFIG_LINUX_MTD == 1
-/* trivial wrapper to avoid cluttering internal_init() with #if */
-static inline int try_mtd(void) { return programmer_linux_mtd.init(); };
-#else
-static inline int try_mtd(void) { return 1; };
-#endif
-
-/* mcp6x_spi.c */
-int mcp6x_spi_init(int want_spi);
-
-
-
-/* sb600spi.c */
-int sb600_probe_spi(struct pci_dev *dev);
-
-/* wbsio_spi.c */
-int wbsio_check_for_spi(void);
-#endif
-
/* opaque.c */
struct opaque_master {
int max_data_read;
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