Edward O'Callaghan submitted this change.
flashchips.c: Add GD25Q256D from downstream
Take definition of GD25Q256D from ChromiumOS repository.
This chip was added in `commit 0c38355c` by dlaurie@google.com
2019-03-17.
Signed-off-by: Alan Green <avg@google.com>
Change-Id: I79d4ed48aa9126a8a6ce455a9564451346195b8f
Reviewed-on: https://review.coreboot.org/c/flashrom/+/35480
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>
---
M flashchips.c
M flashchips.h
2 files changed, 39 insertions(+), 0 deletions(-)
diff --git a/flashchips.c b/flashchips.c
index 3994c93..e6215a0 100644
--- a/flashchips.c
+++ b/flashchips.c
@@ -6276,6 +6276,44 @@
{
.vendor = "GigaDevice",
+ .name = "GD25Q256D",
+ .bustype = BUS_SPI,
+ .manufacture_id = GIGADEVICE_ID,
+ .model_id = GIGADEVICE_GD25Q256D,
+ .total_size = 32768,
+ .page_size = 256,
+ .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP | FEATURE_4BA_WREN,
+ .tested = TEST_UNTESTED,
+ .probe = probe_spi_rdid,
+ .probe_timing = TIMING_ZERO,
+ .block_erasers =
+ {
+ {
+ .eraseblocks = { {4 * 1024, 8192} },
+ .block_erase = spi_block_erase_20,
+ }, {
+ .eraseblocks = { {32 * 1024, 1024} },
+ .block_erase = spi_block_erase_52,
+ }, {
+ .eraseblocks = { {64 * 1024, 512} },
+ .block_erase = spi_block_erase_d8,
+ }, {
+ .eraseblocks = { {32 * 1024 * 1024, 1} },
+ .block_erase = spi_block_erase_60,
+ }, {
+ .eraseblocks = { {32 * 1024 * 1024, 1} },
+ .block_erase = spi_block_erase_c7,
+ }
+ },
+ .printlock = spi_prettyprint_status_register_bp3_srwd,
+ .unlock = spi_disable_blockprotect,
+ .write = spi_chip_write_256,
+ .read = spi_chip_read,
+ .voltage = {2700, 3600},
+ },
+
+ {
+ .vendor = "GigaDevice",
.name = "GD25Q32(B)",
.bustype = BUS_SPI,
.manufacture_id = GIGADEVICE_ID,
diff --git a/flashchips.h b/flashchips.h
index 7b8bf04..c4b863d 100644
--- a/flashchips.h
+++ b/flashchips.h
@@ -372,6 +372,7 @@
#define GIGADEVICE_GD25Q32 0x4016 /* Same as GD25Q32B */
#define GIGADEVICE_GD25Q64 0x4017 /* Same as GD25Q64B */
#define GIGADEVICE_GD25Q128 0x4018 /* GD25Q128B and GD25Q128C only, can be distinguished by SFDP */
+#define GIGADEVICE_GD25Q256D 0x4019
#define GIGADEVICE_GD25VQ21B 0x4212
#define GIGADEVICE_GD25VQ41B 0x4213 /* Same as GD25VQ40C, can be distinguished by SFDP */
#define GIGADEVICE_GD25VQ80C 0x4214
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