2 is the latest approved patch-set.
No files were changed between the latest approved patch-set and the submitted one.


tree/: Rename ERROR_NONFATAL to ERROR_FLASHROM_NONFATAL

Change-Id: I5c30fec0cebab2b7d10e2789761889abc3a14dd3
Signed-off-by: Edward O'Callaghan <quasisec@google.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/68777
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Anastasia Klimchuk <aklm@chromium.org>
Reviewed-by: Felix Singer <felixsinger@posteo.net>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
---
M chipset_enable.c
M include/flash.h
M sb600spi.c
3 files changed, 28 insertions(+), 13 deletions(-)

diff --git a/chipset_enable.c b/chipset_enable.c
index fec4f95..b9144d1 100644
--- a/chipset_enable.c
+++ b/chipset_enable.c
@@ -822,7 +822,7 @@
 		return ret_spi;
 
 	if (((boot_buses & BUS_FWH) && ret_fwh) || ((boot_buses & BUS_SPI) && ret_spi))
-		return ERROR_NONFATAL;
+		return ERROR_FLASHROM_NONFATAL;
 
 	/* Suppress unknown laptop warning if we booted from SPI. */
 	if (boot_buses & BUS_SPI)
@@ -964,7 +964,7 @@
 	const int ret_spi = ich_init_spi(cfg, spibar, pch_generation);
 	if (ret_spi != ERROR_FLASHROM_FATAL) {
 		if (ret_bc || ret_spi)
-			ret = ERROR_NONFATAL;
+			ret = ERROR_FLASHROM_NONFATAL;
 		else
 			ret = 0;
 	}
@@ -1083,7 +1083,7 @@
 		return ret_spi;
 
 	if (((boot_buses & BUS_FWH) && ret_fwh) || ((boot_buses & BUS_SPI) && ret_spi))
-		return ERROR_NONFATAL;
+		return ERROR_FLASHROM_NONFATAL;
 
 	/* Suppress unknown laptop warning if we booted from SPI. */
 	if (boot_buses & BUS_SPI)
@@ -1346,7 +1346,7 @@
 	if (pci_read_byte(dev, AMD_ENREG) != new) {
 		msg_pwarn("Setting register 0x%x to 0x%02x on %s failed (WARNING ONLY).\n",
 			  AMD_ENREG, new, name);
-		return ERROR_NONFATAL;
+		return ERROR_FLASHROM_NONFATAL;
 	}
 	msg_pdbg2("Set ROM enable bit successfully.\n");
 
@@ -1470,7 +1470,7 @@
 {
 	rpci_write_byte(dev, 0x92, 0);
 	if (enable_flash_nvidia_common(cfg, dev, name))
-		return ERROR_NONFATAL;
+		return ERROR_FLASHROM_NONFATAL;
 	else
 		return 0;
 }
@@ -1545,7 +1545,7 @@
 		err++;
 
 	if (err > 0)
-		return ERROR_NONFATAL;
+		return ERROR_FLASHROM_NONFATAL;
 	else
 		return 0;
 }
@@ -1620,7 +1620,7 @@
 	rpci_write_word(dev, 0x90, wordval);
 
 	if (enable_flash_nvidia_common(cfg, dev, name))
-		return ERROR_NONFATAL;
+		return ERROR_FLASHROM_NONFATAL;
 	else
 		return 0;
 }
@@ -1661,7 +1661,7 @@
 		msg_pinfo("Please send the log files created by \"flashrom -p internal -o logfile\" to\n"
 			  "flashrom@flashrom.org with \"your board name: flashrom -V\" as the subject to\n"
 			  "help us finish support for your chipset. Thanks.\n");
-		return ERROR_NONFATAL;
+		return ERROR_FLASHROM_NONFATAL;
 	}
 
 	/* Force enable SPI and disable LPC? Not a good idea. */
@@ -2240,7 +2240,7 @@
 			msg_pinfo("FAILED!\n");
 		else if (ret == 0)
 			msg_pinfo("OK.\n");
-		else if (ret == ERROR_NONFATAL)
+		else if (ret == ERROR_FLASHROM_NONFATAL)
 			msg_pinfo("PROBLEMS, continuing anyway\n");
 		if (ret == ERROR_FLASHROM_FATAL) {
 			msg_perr("FATAL ERROR!\n");
diff --git a/include/flash.h b/include/flash.h
index e6d5679..1456134 100644
--- a/include/flash.h
+++ b/include/flash.h
@@ -495,7 +495,7 @@
 int register_chip_restore(chip_restore_fn_cb_t func, struct flashctx *flash, uint8_t status);
 
 /* Something happened that shouldn't happen, but we can go on. */
-#define ERROR_NONFATAL 0x100
+#define ERROR_FLASHROM_NONFATAL 0x100
 
 /* Something happened that shouldn't happen, we'll abort. */
 #define ERROR_FLASHROM_FATAL -0xee
diff --git a/sb600spi.c b/sb600spi.c
index 68a5690..8c018a3 100644
--- a/sb600spi.c
+++ b/sb600spi.c
@@ -665,7 +665,7 @@
 
 	enum amd_chipset amd_gen = determine_generation(dev);
 	if (amd_gen == CHIPSET_AMD_UNKNOWN)
-		return ERROR_NONFATAL;
+		return ERROR_FLASHROM_NONFATAL;
 
 	/* How to read the following table and similar ones in this file:
 	 * "?" means we have no datasheet for this chipset generation or it doesn't have any relevant info.
@@ -748,7 +748,7 @@
 
 	if (((tmp >> 22) & 0x1) == 0 || ((tmp >> 23) & 0x1) == 0) {
 		msg_perr("ERROR: State of SpiAccessMacRomEn or SpiHostAccessRomEn prohibits full access.\n");
-		return ERROR_NONFATAL;
+		return ERROR_FLASHROM_NONFATAL;
 	}
 
 	if (amd_gen >= CHIPSET_SB89XX) {
@@ -765,7 +765,7 @@
 		smbus_dev = pcidev_find(0x1022, 0x790b); /* AMD FP4 */
 	if (!smbus_dev) {
 		msg_perr("ERROR: SMBus device not found. Not enabling SPI.\n");
-		return ERROR_NONFATAL;
+		return ERROR_FLASHROM_NONFATAL;
 	}
 
 	/* Note about the bit tests below: If a bit is zero, the GPIO is SPI. */

