September 2024 - flashrom-gerrit

[M] Change in flashrom[main]: tests: Check verify op completed in full if chip memory modified
by Anastasia Klimchuk (Code Review) Sept. 2, 2024

Sept. 2, 2024

Attention is currently required from: Anastasia Klimchuk. Hello Peter Marheine, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/flashrom/+/84078?usp=email to look at the new patch set (#2). The following approvals got outdated and were removed: Verified-1 by build bot (Jenkins) Change subject: tests: Check verify op completed in full if chip memory modified ...................................................................... tests: Check verify op completed in full if chip memory modified The patch adds new functionality to the test: tracking the areas of chip memory that were modified (i.e. by erase or write operation), and then checking those areas were completely covered by verify operation. The test operates over the mock chip memory of 16 bytes, so it is possible to track each byte which was modified, and assert that is has been verified afterwards. Adding the test found a bug which is fixed in this commit. Post-cleanup after processing unaligned region for the case when end region needs to be extended to align with erase block. Writing was done correctly, but post-processing of newcontents could go wrong, which would make verification appear false-negative. Note: at the moment the test is not fully working, test cases #19 are both failing, for the reason they are very edge cases with logical layout covering only a part of the chip, and also this layout being unaligned and smaller than the smallest erase block. Probably needs some clever hack for testing verification. [ FAILED ] 2 test(s), listed below: [ FAILED ] Erase test case #19 [ FAILED ] Write test case #19 Change-Id: I3c5d55a0deb20f23f4072caac8c0dce04cc98fd4 Signed-off-by: Anastasia Klimchuk <aklm(a)flashrom.org> --- M erasure_layout.c M tests/erase_func_algo.c 2 files changed, 119 insertions(+), 6 deletions(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/78/84078/2 -- To view, visit https://review.coreboot.org/c/flashrom/+/84078?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: flashrom Gerrit-Branch: main Gerrit-Change-Id: I3c5d55a0deb20f23f4072caac8c0dce04cc98fd4 Gerrit-Change-Number: 84078 Gerrit-PatchSet: 2 Gerrit-Owner: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Reviewer: Peter Marheine <pmarheine(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Anastasia Klimchuk <aklm(a)chromium.org>

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[M] Change in flashrom[main]: flashchips: add GD25F256F
by Anastasia Klimchuk (Code Review) Sept. 1, 2024

Sept. 1, 2024

Attention is currently required from: Nikolai Artemiev, Stefan Reinauer, Victor Lim. Anastasia Klimchuk has posted comments on this change by Victor Lim. ( https://review.coreboot.org/c/flashrom/+/84090?usp=email ) Change subject: flashchips: add GD25F256F ...................................................................... Patch Set 1: (2 comments) Commit Message: https://review.coreboot.org/c/flashrom/+/84090/comment/f12ac706_6445cc8d?us… : PS1, Line 10: Will send the datasheet. Got it by email, you can remove this line, thank you! File flashchips.c: https://review.coreboot.org/c/flashrom/+/84090/comment/3540b503_f38d7516?us… : PS1, Line 8058: STATUS1, 7 But this bit (S7 on page 14) is marked as Reserved? -- To view, visit https://review.coreboot.org/c/flashrom/+/84090?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: flashrom Gerrit-Branch: main Gerrit-Change-Id: Ibbbbb8a55adbcbc2ee1785782c4eb3771d50c167 Gerrit-Change-Number: 84090 Gerrit-PatchSet: 1 Gerrit-Owner: Victor Lim <vlim(a)gigadevice.com> Gerrit-Reviewer: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Reviewer: Nikolai Artemiev <nartemiev(a)google.com> Gerrit-Reviewer: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Victor Lim <vlim(a)gigadevice.com> Gerrit-Attention: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Attention: Nikolai Artemiev <nartemiev(a)google.com> Gerrit-Comment-Date: Mon, 02 Sep 2024 04:02:16 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No

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[M] Change in flashrom[main]: flashchips: add GD25B512MF and GD25R512MF
by Anastasia Klimchuk (Code Review) Sept. 1, 2024

Sept. 1, 2024

Anastasia Klimchuk has submitted this change. ( https://review.coreboot.org/c/flashrom/+/84083?usp=email ) Change subject: flashchips: add GD25B512MF and GD25R512MF ...................................................................... flashchips: add GD25B512MF and GD25R512MF GD25B512MF: 3V 512Mbit, QE = 1 GD25R512MF: GD25B512MF feature + RPMC These two part share the same datasheet on the flash side. https://www.gigadevice.com.cn/Public/Uploads/uploadfile/files/20240412/DS-0… Tested both models on ch347 with erase, write, read, and protection. Change-Id: I9821efb34fb4abb806ad52acec46aad186888c07 Signed-off-by: Victor Lim <vlim(a)gigadevice.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/84083 Reviewed-by: Anastasia Klimchuk <aklm(a)chromium.org> Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> --- M flashchips.c M include/flashchips.h 2 files changed, 57 insertions(+), 0 deletions(-) Approvals: build bot (Jenkins): Verified Anastasia Klimchuk: Looks good to me, approved diff --git a/flashchips.c b/flashchips.c index 0c8517f..02eefa4 100644 --- a/flashchips.c +++ b/flashchips.c @@ -7636,6 +7636,62 @@ .decode_range = DECODE_RANGE_SPI25, }, +{ + .vendor = "GigaDevice", + .name = "GD25B512MF/GD25R512MF", + .bustype = BUS_SPI, + .manufacture_id = GIGADEVICE_ID, + .model_id = GIGADEVICE_GD25B512MF, + .total_size = 65536, + .page_size = 256, + .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP | FEATURE_WRSR2 | FEATURE_WRSR3 | FEATURE_4BA, + .tested = TEST_OK_PREWB, + .probe = PROBE_SPI_RDID, + .probe_timing = TIMING_ZERO, + .block_erasers = + { + { + .eraseblocks = { {4 * 1024, 16384} }, + .block_erase = SPI_BLOCK_ERASE_21, + }, { + .eraseblocks = { {4 * 1024, 16384} }, + .block_erase = SPI_BLOCK_ERASE_20, + }, { + .eraseblocks = { {32 * 1024, 2048} }, + .block_erase = SPI_BLOCK_ERASE_5C, + }, { + .eraseblocks = { {32 * 1024, 2048} }, + .block_erase = SPI_BLOCK_ERASE_52, + }, { + .eraseblocks = { {64 * 1024, 1024} }, + .block_erase = SPI_BLOCK_ERASE_DC, + }, { + .eraseblocks = { {64 * 1024, 1024} }, + .block_erase = SPI_BLOCK_ERASE_D8, + }, { + .eraseblocks = { {64 * 1024 * 1024, 1} }, + .block_erase = SPI_BLOCK_ERASE_60, + }, { + .eraseblocks = { {64 * 1024 * 1024, 1} }, + .block_erase = SPI_BLOCK_ERASE_C7, + } + }, + .printlock = SPI_PRETTYPRINT_STATUS_REGISTER_BP4_SRWD, + .unlock = SPI_DISABLE_BLOCKPROTECT_BP4_SRWD, /* TODO: 2nd status reg (read with 0x35) */ + .write = SPI_CHIP_WRITE256, + .read = SPI_CHIP_READ, + .voltage = {2700, 3600}, + .reg_bits = + { + .srp = {STATUS1, 7, RW}, + .srl = {STATUS2, 6, RW}, + .bp = {{STATUS1, 2, RW}, {STATUS1, 3, RW}, {STATUS1, 4, RW}, {STATUS1, 5, RW}}, + .tb = {STATUS1, 6, RW}, /* Called BP4 in datasheet, acts like TB */ + .cmp = {STATUS3, 3, RW}, + }, + .decode_range = DECODE_RANGE_SPI25, + }, + { .vendor = "GigaDevice", .name = "GD25Q32(B)", diff --git a/include/flashchips.h b/include/flashchips.h index 4456587..5f3bed0 100644 --- a/include/flashchips.h +++ b/include/flashchips.h @@ -396,6 +396,7 @@ #define GIGADEVICE_GD25Q64 0x4017 /* Same as GD25Q64B */ #define GIGADEVICE_GD25Q128 0x4018 /* Same as GD25Q128B, GD25Q127C, GD25Q128C,and GD25Q128E, GD25B128E, GD25R128E can be distinguished by SFDP */ #define GIGADEVICE_GD25Q256D 0x4019 /* Same as GD25B256E, GD25Q256E, GD25R256E */ +#define GIGADEVICE_GD25B512MF 0x401A /* Same as GD25R512MF */ #define GIGADEVICE_GD25VQ21B 0x4212 #define GIGADEVICE_GD25VQ41B 0x4213 /* Same as GD25VQ40C, can be distinguished by SFDP */ #define GIGADEVICE_GD25VQ80C 0x4214 -- To view, visit https://review.coreboot.org/c/flashrom/+/84083?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: merged Gerrit-Project: flashrom Gerrit-Branch: main Gerrit-Change-Id: I9821efb34fb4abb806ad52acec46aad186888c07 Gerrit-Change-Number: 84083 Gerrit-PatchSet: 4 Gerrit-Owner: Victor Lim <vlim(a)gigadevice.com> Gerrit-Reviewer: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Reviewer: Nikolai Artemiev <nartemiev(a)google.com> Gerrit-Reviewer: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>

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