First ROM Image

[Rex O'Regan]

I have a MSI MS-6163 based rig that is currently not doing much except
collecting dust and I am looking at putting coreboot on it as I want to
get involved with this project in some way.

The mobo is not supported as such, however the models either side of it
are and the northbridge, southbridge and super I/O are all supported.

Northbridge:
Intel	82443BX

Southbridge:
Intel	82371EB

Super I/O:
Winbond	W83977EF

I have a few questions regarding the compilation and flashing of the
coreboot image.

Can I compile it on a newer faster computer?(i5 rather than PIII)
How do I set the Northbridge, Southbridge and Super I/O for compilation?
The BIOS chip is in a socket so if I brick the machine all I need to do
is remove the chip and program it again from a separate computer?

That's all for now...

Cheers,
Rex

[Stefan Tauner]

On Sat, 15 Sep 2012 16:05:56 +1000
"Rex O'Regan"  wrote:
> The BIOS chip is in a socket so if I brick the machine all I need to do
> is remove the chip and program it again from a separate computer?

A better idea is to gather replacement chips beforehand and using the
hotswap technique to create backups. To do this you boot with a
known-good chip, swap it for an empty one after boot and write to that
one instead for experiments etc. It is usually a good idea to clearly
mark the backup chip(s) ;)

[ali hagigat]

Your host developing machine can be a modern i5. but Coreboot uses a
special gcc for the BIOS code. Just add the necessary paths as a
prefix in .xcompile file like
AS:=/root/bios/coreboot/util/crossgcc/xgcc/bin/i386-elf-as
But i wrote assembly language from scratch and i used gcc -march and
-mtune options for Pentium III and it worked well.

On Sat, Sep 15, 2012 at 10:35 AM, Rex O'Regan  wrote:
> I have a MSI MS-6163 based rig that is currently not doing much except
> collecting dust and I am looking at putting coreboot on it as I want to
> get involved with this project in some way.
>
> The mobo is not supported as such, however the models either side of it
> are and the northbridge, southbridge and super I/O are all supported.
>
> Northbridge:
> Intel   82443BX
>
> Southbridge:
> Intel   82371EB
>
> Super I/O:
> Winbond W83977EF
>
> I have a few questions regarding the compilation and flashing of the
> coreboot image.
>
> Can I compile it on a newer faster computer?(i5 rather than PIII)
> How do I set the Northbridge, Southbridge and Super I/O for compilation?
> The BIOS chip is in a socket so if I brick the machine all I need to do
> is remove the chip and program it again from a separate computer?
>
> That's all for now...
>
> Cheers,
> Rex