Builing Coreboot

Hi,
I'm new to the Coreboot project. I am an experienced electronics technician, so 
desoldering and burning flash chips is second nature to me, but I'm not a 
programmer so please forgive me if this seems like a silly question.

I've been poking around the Coreboot home pages for the last few days. I've 
downloaded all the required packages to my Gentoo box and had a good look at 
what is there. I've read through some of the various documents on the web site 
about how to build Coreboot and I think I now have a basic understanding of how 
it all works.

My target system is a Clevo laptop with an Intel 82855PM/GM northbridge and an 
82801DB(ICH-4m) south bridge. Both of these chips are listed on the supported 
chipsets page (albeit I understand that the 82855PM/GM is still a work in 
progress).

My question is, do I have to set any build flags or edit any configuration 
files before building Coreboot, to support these chips? Or does Coreboot 
support every device on the supported chipsets page "out of the box" so to 
speak?

I know that I have to edit a configuration file to specify the payload I wish 
to use, but I cannot find anything that tells me wether or not I have to 
configure Coreboot for the specific chipset on the target mainboard.

Thanks for your time and keep up the good work. It's a very interesting project 
and I'm keen to help out even if only by testing on different platforms.

Regards,
Ben


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[Carl-Daniel Hailfinger]

Hi Ben,

On 01.06.2009 01:27, [e-mail] wrote:
> I'm new to the Coreboot project.

Welcome!
> I am an experienced electronics technician, so 
> desoldering and burning flash chips is second nature to me, but I'm not a 
> programmer so please forgive me if this seems like a silly question.

There are no silly questions.
> My target system is a Clevo laptop with an Intel 82855PM/GM northbridge and an 
> 82801DB(ICH-4m) south bridge. Both of these chips are listed on the supported 
> chipsets page (albeit I understand that the 82855PM/GM is still a work in 
> progress).

There's one problem with your target system: It's a laptop. Laptops have
embedded controllers and those are _very_ hairy to deal with because
they are usually undocumented and talking with them in unexpected ways
can even turn off the machine or wreak other havoc.
> My question is, do I have to set any build flags or edit any configuration 
> files before building Coreboot, to support these chips? Or does Coreboot 
> support every device on the supported chipsets page "out of the box" so to 
> speak?

Due to size constraints in today's flash chips, adding support for
multiple chipsets (or even multiple mainboards with the same chipset) is
almost infeasible.
That's why coreboot has "targets" which are configurations specifying
the exact chipset and each oddball mainboard setting. A target not
exactly matching your mainboard is very unlikely to work.
> I know that I have to edit a configuration file to specify the payload I wish 
> to use, but I cannot find anything that tells me wether or not I have to 
> configure Coreboot for the specific chipset on the target mainboard.

There are a few build tutorials in our wiki for various boards and I
hope some of them can give you an insight into how building a particular
target works.
> I'm keen to help out even if only by testing on different platforms.

We're a team consisting of hardware specialists and software specialists
and a few of us specialize in both. I hope you feel welcome and stick
around. We have plenty of exciting projects which can use help from
electronics specialists like you.


Regards,
Carl-Daniel

-- 
http://www.hailfinger.org/

[Peter Stuge]

Hi Ben,

[e-mail] wrote:
> My target system is a Clevo laptop

What Carl-Daniel wrote about embedded controllers applies. But since
you can recover, it might still be interesting to give it a go.
> (albeit I understand that the 82855PM/GM is still a work in progress)

I have met at least one person who has production 855 code, I will
get in touch with them if you find that current code is lacking.
> I know that I have to edit a configuration file to specify the
> payload I wish to use,

Yes.
> but I cannot find anything that tells me wether or not I have to
> configure Coreboot for the specific chipset on the target
> mainboard.

Carl-Daniel mentioned targets. This is the starting point when
building coreboot.

In the v2 tree, there is the targets/ directory. In there you find
all targets, grouped by vendor. There is no target for your exact
system, so find one that is as close as possible. One target which
uses 855 is digitallogic/adl855pc. To build that, you do:

cd targets
./buildtarget digitallogic/adl855pc
cd digitallogic/adl855pc/adl855pc
make

(you can also run make -C digitallogic/adl855pc/adl855pc and skip cd)

After those commands, you should have a coreboot.rom file.

The payload is specified in digitallogic/adl855pc/Config.lb, which is
parsed by buildtarget and used to create Makefiles underneath the
final leaf directory. If you change Config.lb, you have to re-run
buildtarget.

Note that buildtarget doesn't check for the payload, so you'll get
Makefiles which fail to build.

Then try booting coreboot.rom in your system. Chances are zero that
it will work, but if the laptop is a little similar to the
digitallogic, you may get serial output. Most likely you'll have to
change the superio though, in
src/mainboard/digitallogic/adl855pc/Config.lb to the superio which is
used in the laptop, before you get anything from the serial port.


//Peter

[Ben]

On Monday 01 June 2009 11:23:09 Peter Stuge wrote:
> Hi Ben,
>
> [e-mail] wrote:
> > My target system is a Clevo laptop
>
> What Carl-Daniel wrote about embedded controllers applies. But since
> you can recover, it might still be interesting to give it a go.
> > (albeit I understand that the 82855PM/GM is still a work in progress)
>
> I have met at least one person who has production 855 code, I will
> get in touch with them if you find that current code is lacking.
> > I know that I have to edit a configuration file to specify the
> > payload I wish to use,
>
> Yes.
> > but I cannot find anything that tells me wether or not I have to
> > configure Coreboot for the specific chipset on the target
> > mainboard.
>
> Carl-Daniel mentioned targets. This is the starting point when
> building coreboot.
>
> In the v2 tree, there is the targets/ directory. In there you find
> all targets, grouped by vendor. There is no target for your exact
> system, so find one that is as close as possible. One target which
> uses 855 is digitallogic/adl855pc. To build that, you do:
>
> cd targets
> ./buildtarget digitallogic/adl855pc
> cd digitallogic/adl855pc/adl855pc
> make
>
> (you can also run make -C digitallogic/adl855pc/adl855pc and skip cd)
>
> After those commands, you should have a coreboot.rom file.
>
> The payload is specified in digitallogic/adl855pc/Config.lb, which is
> parsed by buildtarget and used to create Makefiles underneath the
> final leaf directory. If you change Config.lb, you have to re-run
> buildtarget.
>
> Note that buildtarget doesn't check for the payload, so you'll get
> Makefiles which fail to build.
>
> Then try booting coreboot.rom in your system. Chances are zero that
> it will work, but if the laptop is a little similar to the
> digitallogic, you may get serial output. Most likely you'll have to
> change the superio though, in
> src/mainboard/digitallogic/adl855pc/Config.lb to the superio which is
> used in the laptop, before you get anything from the serial port.
>
> //Peter

Thanks guys, I've had another look at the source code as was suggested and 
read through the developer documents on the web site again. I think I have a 
better grasp of the situation now.

I found what I think are the CPU and chipset config settings in the  and over 
the next week I'll gear up to have a go at a desktop mainboard (simpler to 
repair if something goes wrong). If I get it working I'll post my config 
files. Then I'll consider trying on the laptop.

I've no doubt I'll need to ask you some more questions very soon..... I'll try 
not to be too annoying though....

Thanks again for your time!

Ben