Hello Friends ,
I compiled Coreboot 4.5 for Minnow board max and see this message in consol.
"Memory Configure Data Hob is not present. Not updating MRC data in flash."
what is Data Hob? Cold you help me how to solve it?
Best wishes , Zhara
---------- Forwarded message --------- From: zahra rahimkhani firstname.lastname@example.org Date: Tue, Aug 21, 2018 at 4:52 PM Subject: Fwd: [coreboot] USB to Serial Converters To: cc: Coreboot email@example.com
---------- Forwarded message --------- From: zahra rahimkhani firstname.lastname@example.org Date: Sat, Aug 18, 2018 at 12:47 PM Subject: Re: [coreboot] USB to Serial Converters To: David Hendricks email@example.com
Thank you very much for your help .
I used version 4.8 but it shows this message on consol and do not boot usb flash or sata.
Running option rom at c000:0003 Turning on vga text mode console SeaBIOS (version rel-1.11.2-0-gf9626cc) EHCI init on dev 00:1d.0 (regs=0xd061e020) WARNING - Timeout at i8042_flush:71! AHCI controller at 00:13.0, iobase 0xd061d000, irq 10 Searching bootorder for: /pci@i0cf8/*@12 Found 0 lpt ports Found 1 serial ports Searching bootorder for: /pci@i0cf8/usb@1d/hub@1/storage@1/*@0/*@0,0 Searching bootorder for: /pci@i0cf8/usb@1d/hub@1/usb-*@1 USB MSC vendor='UFD 2.0' product='Silicon-Power8G' rev='1100' type=0 removable=1 USB MSC blksize=512 sectors=15730688 Initialized USB HUB (1 ports used) All threads complete. Scan for option roms
Press ESC for boot menu.
Searching bootorder for: HALT drive 0x000f62c0: PCHS=0/0/0 translation=lba LCHS=979/255/63 s=15730688 Space available for UMB: cd800-ed800, f5b60-f62c0 Returned 253952 bytes of ZoneHigh e820 map has 18 items: 0: 0000000000000000 - 000000000009fc00 = 1 RAM 1: 000000000009fc00 - 00000000000a0000 = 2 RESERVED 2: 00000000000f0000 - 0000000000100000 = 2 RESERVED 3: 0000000000100000 - 0000000020000000 = 1 RAM 4: 0000000020000000 - 0000000020100000 = 2 RESERVED 5: 0000000020100000 - 000000007ad9c000 = 1 RAM 6: 000000007ad9c000 - 0000000080000000 = 2 RESERVED 7: 00000000e0000000 - 00000000f0000000 = 2 RESERVED 8: 00000000feb00000 - 00000000fec01000 = 2 RESERVED 9: 00000000fed01000 - 00000000fed02000 = 2 RESERVED 10: 00000000fed03000 - 00000000fed04000 = 2 RESERVED 11: 00000000fed05000 - 00000000fed06000 = 2 RESERVED 12: 00000000fed08000 - 00000000fed09000 = 2 RESERVED 13: 00000000fed0c000 - 00000000fed10000 = 2 RESERVED 14: 00000000fed1c000 - 00000000fed1d000 = 2 RESERVED 15: 00000000fee00000 - 00000000fee01000 = 2 RESERVED 16: 00000000fef00000 - 00000000ff000000 = 2 RESERVED 17: 00000000ff800000 - 0000000100000000 = 2 RESERVED enter handle_19: NULL Booting from Hard Disk... Booting from 0000:7c00
I would be grateful if you guide me . I should set a special config or no?
Best , Zahra
On Sun, Aug 5, 2018 at 4:35 PM David Hendricks firstname.lastname@example.org wrote:
Hi Zahra, Yes, I used the 6-pin serial port header. Also, make sure the microcode header(s) you include correspond to the CPUID of your processor. The E3825 and E3826 use different microcode headers, so M0130679901.h will not work for you.
Please keep the coreboot mailing list CC'd. I haven't done anything with Minnowboard in several months and others may be able to help.
On Thu, Aug 2, 2018 at 5:01 PM, zahra rahimkhani < email@example.com> wrote:
Thank you for your help. I extract your file and got M0130679901.h as Microcode but my board does not work it did not show anything. I use E3825. In previous notes, you told "My guess is that you don't have CONFIG_ENABLE_BUILTIN_COM1 selected (under "Chipset"), which is an option you have to set in addition to the stuff under "Console." but in your config, you had not enabled this option. Could you help me with this and Did you use 6 pins that are separated on board for console port? I do not know what is my problem .it did not show anything log.
Thank you for your time. Zahra
On Wed, Aug 1, 2018 at 2:04 AM David Hendricks firstname.lastname@example.org wrote:
Hi Zahra, That header may be out of date (https://mail.coreboot.org/pipermail/coreboot/2017-August/084800.html).
I had to manually download the microcode file corresponding to my processor SKU from Intel. Use the link I sent you earlier to download Baytrail_FSP_Gold4.tgz and see if the microcode headers included in that tarball match your processor. The Atom on my Minnowboard Turbot has a CPUID of 30679, so I needed to use M0130679901.h.
(note that the Minnowboard Max uses an Atom E3825, while the Turbot uses an E3826 dual-core SoC or E3845 quad-core SoC)
On Mon, Jul 30, 2018 at 2:36 AM, zahra rahimkhani email@example.com wrote:
for Microcode file I just it from coreboot source from this path coreboot/3rdparty/blobs/soc/intel/baytrail/microcode_blob.h
Is that good ?
On Sun, Jul 29, 2018 at 1:18 PM zahra rahimkhani <
Thank you very much for your guide.
I got this comments on my config and changes it based on your config. But I can not see any thing on output. Could you tell me which Uart pins do you use on Minnowboard max
I used it 6 pin that are separately on board .
I would be grateful if you guide me . I got my new config here . https://paste.flashrom.org/view.php?id=3097
Also , Could you tell me what is this parameter CONFIG_UART_FOR_CONSOLE=0 and CONFIG_DRIVERS_UART_8250IO
On Fri, Jul 27, 2018 at 11:06 AM David Hendricks firstname.lastname@example.org wrote:
> I got my config file here > https://paste.flashrom.org/view.php?id=3096
Thanks, that helps a lot!
The last config that I tested is
If you diff my config and yours, it seems you have several options disabled which I think you should try enabling: CONFIG_HAVE_IFD_BIN CONFIG_HAVE_ME_BIN CONFIG_TTYS0_LCS CONFIG_DRIVERS_UART_8250IO CONFIG_IFD_BIN_PATH CONFIG_ME_BIN_PATH CONFIG_LOCK_MANAGEMENT_ENGINE CONFIG_DRIVERS_UART CONFIG_CONSOLE_SERIAL CONFIG_CONSOLE_SERIAL_115200
You can find these by using the search function in `make menuconfig`. Press '/' and type a Kconfig option.
> I would be grateful if you check my config and tell me what is
> in Coreboot and how > I use it. > and How I find Intel ME file for my board and GBE for a network on
ifdtool is a tool for viewing and manipulating an Intel Flash
binary. The flash descriptor is a 4KB data structure at the start of
ROM's address space (offset 0x000000-0x000fff).
To build it: `make -C util/ifdtool` To run it: `util/ifdtool/ifdtool`
You'll probably want to use the '-x' option to extract the individual modules from an existing Minnowboard Max firmware image (e.g. the
that comes with the board). That will give you the ME and GBE files.