I am experimenting SMM/SMI on Minnowboard Max using the KMC (USB Legacy
Keyboard/Mouse Control) register. Per Baytrial datasheet, port60/64
read/write events would cause SMI if enabled. In Linux, I can see the status
bits set upon read/write port 60 or 64.
I am also able to enable SMI in KMC register in coreboot and verify the
settings in Linux. However, I am not sure whether the SMI handler is entered
when the events occur. The system would just hang, after writing to port 64
for example. None of my instrumented code in southbridge_smi_handler() in
soc/intel/fsp_baytrail/smihandler.c seems to be executed.
My minnowboard max coreboot build is based on
Am I missing something to hook up/relocate the SMI handler? Suggestions on
debugging approach would be much appreciated.