On the SATA MSI disable problem: calling sbAfterPciInit from cpu_bus_init succeeds in disabling MSI for SATA. So now the linux driver correctly does not try to enable MSI for SATA. But that code is not minimal and might not be the right thing to do.
Back to the ethernet problem. Comparing PCI configuration spaces for 00:15.1 I see that coreboot : runs at 2.5GT/s (PCIe generation 1 speed), and vendor fw: runs at 5GT/s (PCIe generation 2 speed). PCI config 0x88 is the relevant one.
See SB800 RPR Section 5.19 "GPP Gen2 Speed Change" and vendorcode/amd/cimx/sb800/Gpp.c
If I enable GppGen2 in the config as in the patch below then the kernel irq errors disappear and incoming ethernet transmissions seem ok.
This could be made settable for each mainboard (e.g. from devicetree.cb) if necessary, but is there any need ? The SB800 BIOS Dev Guide Section 1.3 (small print) says only SB810 and SB850 support Gen2 (so I guess we have one of those), so perhaps. Does anyone know?
Signed-off-by: Per Hansen firstname.lastname@example.org
diff --git a/src/southbridge/amd/cimx/sb800/cfg.c b/src/southbridge/amd/cimx/sb800/cfg.c index 0a09e11..09b4a64 100644 --- a/src/southbridge/amd/cimx/sb800/cfg.c +++ b/src/southbridge/amd/cimx/sb800/cfg.c @@ -101,7 +101,7 @@ void sb800_cimx_config(AMDSBCFG *sb_config) //sb_config->PORTCONFIG.PortCfg.PortHotPlug = TRUE; sb_config->GppUnhidePorts = TRUE; //visable always, even port empty //sb_config->NbSbGen2 = TRUE; - //sb_config->GppGen2 = TRUE; + sb_config->GppGen2 = TRUE;
//cimx BTS fix sb_config->GppMemWrImprove = TRUE;