Ok, looking at the differences between your code ant the GA-G41M code, I
think you might want to add back in the ich7_enable_lpc() function (or
something equivalent) . My guess is that you're not sending the necessary
IO ports out to LPC.
On Mon, Mar 21, 2016 at 2:25 PM, Renze Nicolai <renze(a)rnplus.nl> wrote:
Autoport wasn't much use to me since it didn't recognize anything.
However it left behind all kinds of logs like the full lspci output and
stuff like that -> that's why I shared it.
This is the output of superiotool using the OEM BIOS.
The SIO is configured for 0x2E.
On Mon, 2016-03-21 at 13:47 -0600, Martin Roth wrote:
I haven't used Autoport, so I can't help much with that - looking
at the output, I'm not sure this chipset is supported.
On the console:
Have you run superiotool on your platform with the OEM BIOS? Can we
get the output from that? Is your SIO configured for IO address 0x2E
The hang looks unrelated to the console - It looks like you're
failing in memory configuration, so I'd keep adding post codes to see
if you can track down where the actual failure is. This will
probably become plain once you get the console working though.
On Fri, Mar 18, 2016 at 4:45 PM, Renze Nicolai <renze(a)rnplus.nl>
> Hello everyone,
> I am trying to port coreboot to the Asus P5G41T-M LX motherboard
> but I
> got stuck.
> This motherboard has:
> - Northbridge: Intel G41
> - Southbridge: ICH7
> - Super IO: w83627dhg
> I used the Gigabye GA-G41M-ES2L code as base since I think it has
> same north- and southbridge. That motherboard has a different Super
> chip though.
> I tried to make the devicetree.cb file valid and I replaced the
> code in romstage.c with code for the superIO chip on my board. I
> tried to set the correct values in the init code for the superio
> (irq routing etc).
> In romstage.c I added some post codes. The motherboard gets to
> 0xA6 and then stops.
> Serial output is not working (cable / connection has been tested
> within Linux). Terminal is connected at 115200 baud. No data is
> What I have so far:
> Logs / info about the board (generated by autoport):
> It would be nice if someone could point me in the right direction
> as to
> what to do next.
> Thank you!
> Renze Nicolai
> coreboot mailing list: coreboot(a)coreboot.org
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