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Hi,
we tested the untested flash chip "Winbond W25x80" with flashrom revision 3407. Reading and Erasing the chip went okay, but we encountered an error on writing back the previously read image. Please see the below output for further information:
- ---> Reading BIOS: [root@g1 flashrom]# ./flashrom -r g1-bios.rom Calibrating delay loop... OK. No coreboot table found. Found chipset "Intel ICH7/ICH7R", enabling flash write... OK. Found chip "Winbond W25x80" (1024 KB) at physical address 0xfff00000. === This flash part has status UNTESTED for operations: PROBE READ ERASE WRITE Please email a report to flashrom@coreboot.org if any of the above operations work correctly for you with this flash part. Please include the full output from the program, including chipset found. Thank you for your help! === Reading Flash...done
- ---> Erasing BIOS: [root@g1 flashrom]# ./flashrom -E Calibrating delay loop... OK. No coreboot table found. Found chipset "Intel ICH7/ICH7R", enabling flash write... OK. Found chip "Winbond W25x80" (1024 KB) at physical address 0xfff00000. === This flash part has status UNTESTED for operations: PROBE READ ERASE WRITE Please email a report to flashrom@coreboot.org if any of the above operations work correctly for you with this flash part. Please include the full output from the program, including chipset found. Thank you for your help! === Erasing flash chip. [root@g1 flashrom]# ./flashrom -r empty.rom Calibrating delay loop... OK. No coreboot table found. Found chipset "Intel ICH7/ICH7R", enabling flash write... OK. Found chip "Winbond W25x80" (1024 KB) at physical address 0xfff00000. === This flash part has status UNTESTED for operations: PROBE READ ERASE WRITE Please email a report to flashrom@coreboot.org if any of the above operations work correctly for you with this flash part. Please include the full output from the program, including chipset found. Thank you for your help! === Reading Flash...done [root@g1 flashrom]# hexdump empty.rom 0000000 ffff ffff ffff ffff ffff ffff ffff ffff * 0100000
- ---> Writing BIOS: [root@g1 flashrom]# ./flashrom -w g1-bios.rom Calibrating delay loop... OK. No coreboot table found. Found chipset "Intel ICH7/ICH7R", enabling flash write... OK. Found chip "Winbond W25x80" (1024 KB) at physical address 0xfff00000. === This flash part has status UNTESTED for operations: PROBE READ ERASE WRITE Please email a report to flashrom@coreboot.org if any of the above operations work correctly for you with this flash part. Please include the full output from the program, including chipset found. Thank you for your help! === Segmentation fault
- ---> gdb Backtrace of BIOS write attempt: [root@flashrom]# gdb --args ./flashrom -w g1-bios.rom GNU gdb Red Hat Linux (6.3.0.0-1.21rh) Copyright 2004 Free Software Foundation, Inc. GDB is free software, covered by the GNU General Public License, and you are welcome to change it and/or distribute copies of it under certain conditions. Type "show copying" to see the conditions. There is absolutely no warranty for GDB. Type "show warranty" for details. This GDB was configured as "i386-redhat-linux-gnu"...Using host libthread_db library "/lib/libthread_db.so.1".
(gdb) r Starting program: /tmp/flashrom/flashrom -w g1-bios.rom Reading symbols from shared object read from target memory...done. Loaded system supplied DSO at 0x6ea000 Calibrating delay loop... OK. No coreboot table found. Found chipset "Intel ICH7/ICH7R", enabling flash write... OK. Found chip "Winbond W25x80" (1024 KB) at physical address 0xfff00000. === This flash part has status UNTESTED for operations: PROBE READ ERASE WRITE Please email a report to flashrom@coreboot.org if any of the above operations work correctly for you with this flash part. Please include the full output from the program, including chipset found. Thank you for your help! ===
Program received signal SIGSEGV, Segmentation fault. 0x00ec7d0d in strdup () from /lib/libc.so.6 (gdb) bt #0 0x00ec7d0d in strdup () from /lib/libc.so.6 #1 0x0804c89d in show_id (bios=0xb7c69008 "ø", size=1048576, force=0) at layout.c:73 #2 0x0804da29 in main (argc=3, argv=0xbfd77034) at flashrom.c:565 (gdb)
- ---> write attempt with verbose option: === coreboot last image size (not ROM size) is -1533804544 bytes. Segmentation fault
Does this information help you to figure out what's going wrong?
Best Regards
Björn Gerhart WINCOR NIXDORF International GmbH Retail Store Solutions M24 Rohrdamm 7, Haus 16 13629 Berlin Germany
Phone +49 (30) 5017 - 1343 FAX +49 (30) 5017 - 1305
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Gerhart, Bjoern