Add support of superio sch4304. The Device id is 0x90. The number of X-BUS logical device is 11.
I have not get the board to test it. I will have one. But I believe it is right, isn't it?
Signed-off-by: Zheng Bao zheng.bao@amd.com
Index: src/superio/smsc/smscsuperio/superio.c =================================================================== --- src/superio/smsc/smscsuperio/superio.c (revision 4952) +++ src/superio/smsc/smscsuperio/superio.c (working copy) @@ -61,6 +61,7 @@ #define SCH3112 0x7c #define SCH5307 0x81 /* Rebranded LPC47B397(?) */ #define SCH5027D 0x89 +#define SCH4304 0x90 /* SCH4304 */
/* Register defines */ #define DEVICE_ID_REG 0x20 /* Device ID register */ @@ -137,6 +138,7 @@ {SCH3112, {0, 3, 4, 5, -1, 7, -1, -1, -1, -1, -1, -1, 10, -1, -1}}, {SCH5307, {0, 3, 4, 5, -1, 7, -1, -1, 8, -1, -1, -1, 10, -1, -1}}, {SCH5027D, {0, 3, 4, 5, -1, 7, -1, -1, -1, -1, -1, -1, 10, -1, 11}}, + {SCH4304, {0, 3, 4, 5, -1, 7, -1, 11, -1, -1, -1, -1, 10, -1, -1}}, };
/**
Does anyone review it before it is drowned?
Zheng
-----Original Message----- From: coreboot-bounces+zheng.bao=amd.com@coreboot.org [mailto:coreboot-bounces+zheng.bao=amd.com@coreboot.org] On Behalf Of Bao, Zheng Sent: Tuesday, November 24, 2009 11:23 AM To: coreboot Subject: [coreboot] [PATCH]: Add superio sch4304 support.
Add support of superio sch4304. The Device id is 0x90. The number of X-BUS logical device is 11.
I have not get the board to test it. I will have one. But I believe it is right, isn't it?
Signed-off-by: Zheng Bao zheng.bao@amd.com
Index: src/superio/smsc/smscsuperio/superio.c =================================================================== --- src/superio/smsc/smscsuperio/superio.c (revision 4952) +++ src/superio/smsc/smscsuperio/superio.c (working copy) @@ -61,6 +61,7 @@ #define SCH3112 0x7c #define SCH5307 0x81 /* Rebranded LPC47B397(?) */ #define SCH5027D 0x89 +#define SCH4304 0x90 /* SCH4304 */
/* Register defines */ #define DEVICE_ID_REG 0x20 /* Device ID register */ @@ -137,6 +138,7 @@ {SCH3112, {0, 3, 4, 5, -1, 7, -1, -1, -1, -1, -1, -1, 10, -1, -1}}, {SCH5307, {0, 3, 4, 5, -1, 7, -1, -1, 8, -1, -1, -1, 10, -1, -1}}, {SCH5027D, {0, 3, 4, 5, -1, 7, -1, -1, -1, -1, -1, -1, 10, -1, 11}}, + {SCH4304, {0, 3, 4, 5, -1, 7, -1, 11, -1, -1, -1, -1, 10, -1, -1}}, };
/**
Hi,
On Thu, Nov 26, 2009 at 10:11:43AM +0800, Bao, Zheng wrote:
Does anyone review it before it is drowned?
I can't find the datasheet right now, but if the ID is 0x90 and the numbers you added in that table are the Super I/O LDNs, then this is
Acked-by: Uwe Hermann uwe@hermann-uwe.de
The Super I/O only has FDC PP SP1 SP2 KBC XBUS RT as LDNs, correct?
// Chip FDC PP SP1 SP2 RTC KBC AUX XBUS HWM GAME PME MPU RT ACPI SMB
[...]
{SCH3112, {0, 3, 4, 5, -1, 7, -1, -1, -1, -1, -1, -1, 10, -1, -1}}, {SCH5307, {0, 3, 4, 5, -1, 7, -1, -1, 8, -1, -1, -1, 10, -1, -1}}, {SCH5027D, {0, 3, 4, 5, -1, 7, -1, -1, -1, -1, -1, -1, 10, -1, 11}},
- {SCH4304, {0, 3, 4, 5, -1, 7, -1, 11, -1, -1, -1, -1, 10, -1, -1}},
Uwe.
The datasheet is not public now, isn't it? Does coreboot has the NDA or something else to release sch4304?
Zheng
-----Original Message----- From: Uwe Hermann [mailto:uwe@hermann-uwe.de] Sent: Thursday, November 26, 2009 4:16 PM To: Bao, Zheng Cc: coreboot Subject: Re: [coreboot] [PATCH]: Add superio SMSC sch4304 support.
Hi,
On Thu, Nov 26, 2009 at 10:11:43AM +0800, Bao, Zheng wrote:
Does anyone review it before it is drowned?
I can't find the datasheet right now, but if the ID is 0x90 and the numbers you added in that table are the Super I/O LDNs, then this is
Acked-by: Uwe Hermann uwe@hermann-uwe.de
The Super I/O only has FDC PP SP1 SP2 KBC XBUS RT as LDNs, correct?
// Chip FDC PP SP1 SP2 RTC KBC AUX XBUS HWM GAME PME MPU RT
ACPI SMB [...]
{SCH3112, {0, 3, 4, 5, -1, 7, -1, -1, -1, -1, -1, -1, 10,
-1, -1}},
{SCH5307, {0, 3, 4, 5, -1, 7, -1, -1, 8, -1, -1, -1, 10,
-1, -1}},
{SCH5027D, {0, 3, 4, 5, -1, 7, -1, -1, -1, -1, -1, -1, 10,
-1, 11}},
- {SCH4304, {0, 3, 4, 5, -1, 7, -1, 11, -1, -1, -1, -1, 10,
-1, -1}},
Uwe.
Add support of superio sch4304.
The datasheet of the sch4304 doesnt seems to be public. So the patch should not be based on the information got from datasheet. Here is the result of superiotool.
bash# ./superiotool superiotool r4931 Found SMSC SCH4307 (id=0x90, rev=0x03) at 0x2e
So we can know the Device id is 0x90. The sub-devices which I enabled are the ones whose LDNs don't change at all. So I believe it doesn't hurt anyone.
Maybe I am too sensitive, but I am not sure if the NDA is a problem here.
Signed-off-by: Zheng Bao zheng.bao@amd.com
Index: src/superio/smsc/smscsuperio/superio.c =================================================================== --- src/superio/smsc/smscsuperio/superio.c (revision 4967) +++ src/superio/smsc/smscsuperio/superio.c (working copy) @@ -61,6 +61,7 @@ #define SCH3112 0x7c #define SCH5307 0x81 /* Rebranded LPC47B397(?) */ #define SCH5027D 0x89 +#define SCH4304 0x90 /* SCH4304, SCH4307 */
/* Register defines */ #define DEVICE_ID_REG 0x20 /* Device ID register */ @@ -137,6 +138,7 @@ {SCH3112, {0, 3, 4, 5, -1, 7, -1, -1, -1, -1, -1, -1, 10, -1, -1}}, {SCH5307, {0, 3, 4, 5, -1, 7, -1, -1, 8, -1, -1, -1, 10, -1, -1}}, {SCH5027D, {0, 3, 4, 5, -1, 7, -1, -1, -1, -1, -1, -1, 10, -1, 11}}, + {SCH4304, {0,-1, 4, -1, -1, 7, -1, -1, -1, -1, -1, -1, -1, -1, -1}}, };
/**
-----Original Message----- From: coreboot-bounces@coreboot.org [mailto:coreboot-bounces@coreboot.org] On Behalf Of Bao, Zheng Sent: Thursday, November 26, 2009 4:48 PM To: coreboot Subject: Re: [coreboot] [PATCH]: Add superio SMSC sch4304 support.
The datasheet is not public now, isn't it? Does coreboot has the NDA or something else to release sch4304?
Zheng
-----Original Message----- From: Uwe Hermann [mailto:uwe@hermann-uwe.de] Sent: Thursday, November 26, 2009 4:16 PM To: Bao, Zheng Cc: coreboot Subject: Re: [coreboot] [PATCH]: Add superio SMSC sch4304 support.
Hi,
On Thu, Nov 26, 2009 at 10:11:43AM +0800, Bao, Zheng wrote:
Does anyone review it before it is drowned?
I can't find the datasheet right now, but if the ID is 0x90 and the numbers you added in that table are the Super I/O LDNs, then this is
Acked-by: Uwe Hermann uwe@hermann-uwe.de
The Super I/O only has FDC PP SP1 SP2 KBC XBUS RT as LDNs, correct?
// Chip FDC PP SP1 SP2 RTC KBC AUX XBUS HWM GAME PME MPU RT
ACPI SMB [...]
{SCH3112, {0, 3, 4, 5, -1, 7, -1, -1, -1, -1, -1, -1, 10,
-1, -1}},
{SCH5307, {0, 3, 4, 5, -1, 7, -1, -1, 8, -1, -1, -1, 10,
-1, -1}},
{SCH5027D, {0, 3, 4, 5, -1, 7, -1, -1, -1, -1, -1, -1, 10,
-1, 11}},
- {SCH4304, {0, 3, 4, 5, -1, 7, -1, 11, -1, -1, -1, -1, 10,
-1, -1}},
Uwe.
Wrong attachment. Sent again.
Zheng.
-----Original Message----- From: coreboot-bounces+zheng.bao=amd.com@coreboot.org [mailto:coreboot-bounces+zheng.bao=amd.com@coreboot.org] On Behalf Of Bao, Zheng Sent: Monday, November 30, 2009 11:01 AM To: coreboot Subject: [coreboot] [PATCH]: Updated: Add the superio SMSC sch4304 support.
Add support of superio sch4304.
The datasheet of the sch4304 doesnt seems to be public. So the patch should not be based on the information got from datasheet. Here is the result of superiotool.
bash# ./superiotool superiotool r4931 Found SMSC SCH4307 (id=0x90, rev=0x03) at 0x2e
So we can know the Device id is 0x90. The sub-devices which I enabled are the ones whose LDNs don't change at all. So I believe it doesn't hurt anyone.
Maybe I am too sensitive, but I am not sure if the NDA is a problem here.
Signed-off-by: Zheng Bao zheng.bao@amd.com
Index: src/superio/smsc/smscsuperio/superio.c =================================================================== --- src/superio/smsc/smscsuperio/superio.c (revision 4967) +++ src/superio/smsc/smscsuperio/superio.c (working copy) @@ -61,6 +61,7 @@ #define SCH3112 0x7c #define SCH5307 0x81 /* Rebranded LPC47B397(?) */ #define SCH5027D 0x89 +#define SCH4304 0x90 /* SCH4304, SCH4307 */
/* Register defines */ #define DEVICE_ID_REG 0x20 /* Device ID register */ @@ -137,6 +138,7 @@ {SCH3112, {0, 3, 4, 5, -1, 7, -1, -1, -1, -1, -1, -1, 10, -1, -1}}, {SCH5307, {0, 3, 4, 5, -1, 7, -1, -1, 8, -1, -1, -1, 10, -1, -1}}, {SCH5027D, {0, 3, 4, 5, -1, 7, -1, -1, -1, -1, -1, -1, 10, -1, 11}}, + {SCH4304, {0,-1, 4, -1, -1, 7, -1, -1, -1, -1, -1, -1, -1, -1, -1}}, };
/**
-----Original Message----- From: coreboot-bounces@coreboot.org [mailto:coreboot-bounces@coreboot.org] On Behalf Of Bao, Zheng Sent: Thursday, November 26, 2009 4:48 PM To: coreboot Subject: Re: [coreboot] [PATCH]: Add superio SMSC sch4304 support.
The datasheet is not public now, isn't it? Does coreboot has the NDA or something else to release sch4304?
Zheng
-----Original Message----- From: Uwe Hermann [mailto:uwe@hermann-uwe.de] Sent: Thursday, November 26, 2009 4:16 PM To: Bao, Zheng Cc: coreboot Subject: Re: [coreboot] [PATCH]: Add superio SMSC sch4304 support.
Hi,
On Thu, Nov 26, 2009 at 10:11:43AM +0800, Bao, Zheng wrote:
Does anyone review it before it is drowned?
I can't find the datasheet right now, but if the ID is 0x90 and the numbers you added in that table are the Super I/O LDNs, then this is
Acked-by: Uwe Hermann uwe@hermann-uwe.de
The Super I/O only has FDC PP SP1 SP2 KBC XBUS RT as LDNs, correct?
// Chip FDC PP SP1 SP2 RTC KBC AUX XBUS HWM GAME PME MPU RT
ACPI SMB [...]
{SCH3112, {0, 3, 4, 5, -1, 7, -1, -1, -1, -1, -1, -1, 10,
-1, -1}},
{SCH5307, {0, 3, 4, 5, -1, 7, -1, -1, 8, -1, -1, -1, 10,
-1, -1}},
{SCH5027D, {0, 3, 4, 5, -1, 7, -1, -1, -1, -1, -1, -1, 10,
-1, 11}},
- {SCH4304, {0, 3, 4, 5, -1, 7, -1, 11, -1, -1, -1, -1, 10,
-1, -1}},
Uwe.
On 30.11.2009 08:30, Bao, Zheng wrote:
Add support of superio sch4304.
The datasheet of the sch4304 doesnt seems to be public. So the patch should not be based on the information got from datasheet.
It seems Steve Isaacs had the datasheet as well. No idea if he had to sign a NDA. http://www.mail-archive.com/linuxbios@linuxbios.org/msg14452.html
Does anyone have good contacts at SMSC and can ask for a datasheet without NDA? My experience is that if you say "We will use the datasheet for the free tool XY, which makes it easier to develop hardware with your product", then you often can get datsheets very fast and even without formal NDA.
Maybe I am too sensitive, but I am not sure if the NDA is a problem here.
Signed-off-by: Zheng Bao zheng.bao@amd.com
Bao, Zheng wrote:
The datasheet is not public now, isn't it? Does coreboot has the NDA or something else to release sch4304?
Regards, Carl-Daniel
Bao, Zheng wrote:
Add support of superio sch4304.
The datasheet of the sch4304 doesnt seems to be public. So the patch should not be based on the information got from datasheet. Here is the result of superiotool.
bash# ./superiotool superiotool r4931 Found SMSC SCH4307 (id=0x90, rev=0x03) at 0x2e
So we can know the Device id is 0x90. The sub-devices which I enabled are the ones whose LDNs don't change at all. So I believe it doesn't hurt anyone.
Maybe I am too sensitive, but I am not sure if the NDA is a problem here.
Signed-off-by: Zheng Bao zheng.bao@amd.com
Acked-by: Peter Stuge peter@stuge.se
On Mon, Nov 30, 2009 at 09:45:21PM +0100, Peter Stuge wrote:
Signed-off-by: Zheng Bao zheng.bao@amd.com
Acked-by: Peter Stuge peter@stuge.se
Thanks for the patch, r4968.
I committed the original version of the patch, the LDN numbers are not in any way secret, even if there were an NDA. They can be easily guessed or tested out with hardware access.
Uwe.
-
Bao, Zheng -
Carl-Daniel Hailfinger -
Peter Stuge -
Uwe Hermann